Sandisk Technologies Inc.

Jayesh Pakhale

Yan Li

Toru Miwa

Tz-Yi Liu

Po-Shen Lai

Hiroyuki Mizukoshi

Vijay Chinchole

Jingwen Ouyang

Henry Zhang

Yibo Yin

Spyridon Georgakis

Greg Hilton

Apparatuses, systems, methods, and computer program products are disclosed for a multicore on-die memory controller. An integrated circuit device includes an array of non-volatile memory cells and a microcontroller unit. A microcontroller unit includes a plurality of processing units. Different processing units perform different categories of tasks in parallel for an array of non-volatile memory cells.

Multicore on-die memory microcontroller

Apparatuses, systems, and methods are disclosed for controlling commands for non-volatile memory. An apparatus includes one or more memory die. A memory die includes a command/address buffer, an on-die controller, and a plurality of non-volatile memory cores that share a data path. A core includes an array of non-volatile memory cells. A command/address buffer queues command and address information for a plurality of storage operations for one or more non-volatile memory cores. An on-die controller initiates a first unexecuted read operation and a first unexecuted write operation from a command/address buffer in parallel, in response to determining that core dependencies are satisfied for a read operation and a write operation.

Command control for multi-core non-volatile memory

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San Jose, CA, United States of America

Jayesh Pakhale