Sandisk Technologies Inc.

Jayanth Mysore Thimmaiah

Bhavin Odedara

Srinivasa Rao Sabbineni

Rampraveen Somasundaram

Nitin Kumar Gupta

Venkatesh Ramachandra

Narendhiran Chinnaanangur Ravimohan

Shiv Harit Mathur

Sridhar Yadala

Vinayak Ashok Ghatawade

Elkana Richter

Ramakrishnan Subramanian

Anand Venkitachalam

Ravindra Arjun Madpur

Amandeep Kaur

Srikanth Bojja

Krishnamurthy Dhakshinamurthy

Prashant Kumar Singhai

Prasad Naidu

Ashish Savadia

Anil Kumar Thadi Suryaprakash

Ajay Dhingra

Siddesh Darne

A data storage system includes a storage medium including plurality of memory cells, a storage controller in communication with the storage medium, an electrical interface circuitry configured to pass data via a channel disposed between the storage medium and the storage controller; and voltage training circuitry configured to train a high-level output voltage (VOH) for each of a plurality of data lines of the channel. Training the VOH includes, for each of the plurality of data lines of the channel, calibrating a pull-up driver of the storage controller against an on-die termination circuit of the storage medium, calibrating a pull-down driver of the storage controller against the pull-up driver of the storage controller, and calibrating an on-die termination circuit of the storage controller against a pull-up driver of the storage medium.

High-level output voltage training for non-volatile memory

Disclosed is an apparatus including a datapath and a test circuit. The datapath is configured to transfer data between a memory core and an IO interface. The datapath includes a plurality of circuits, and a memory core interface. The plurality of circuits operates according to a supply voltage. The test circuit is coupled to the datapath, and configured to determine, from a set of operable voltage levels of the supply voltage, a first minimum operable voltage level for the datapath to operate for the data traversing the datapath at a first frequency.

Self testing circuit for power optimization

A temperature identification system may include temperature sensing circuitry and a temperature measurement module. The temperature sensing circuitry may include a ring oscillator that generates a ring oscillator output signal having a frequency that varies depending on an operating temperature on the ring oscillator. A frequency divider circuit may divide the frequency of the ring oscillator output signal such that two or more cycles of a noise component of supply voltage are averaged, which may reduce the impact that the noise has on the frequency of the ring oscillator output signal. In some embodiments, a regulator may supply a regulated voltage to the ring oscillator. The regulator may reduce the impact of the noise for low frequency components of the noise, while the frequency divider may reduce the impact for high frequency of the noise.

Ring oscillators for temperature detection in wideband supply noise environments

Regulator circuitry may include a plurality of output circuits to generate a plurality of regulated output voltages. The regulator circuitry may include a single operational amplifier and a single feedback loop for regulation, which may reduce space and power consumed by the regulator circuitry. A transconductor and current mirror circuitry may be included to generate the plurality of regulated output voltages based a single operational amplifier output voltage generated with the single operational amplifier and feedback loop.

Space and power-saving multiple output regulation circuitry

A high output voltage Vlevel and a low output voltage Vlevel parametric test system may include test circuitry coupled to output nodes of input/output (I/O) driver circuits. The test circuitry may source and sink current to the output nodes while the I/O driver circuits are in pull down and pull up states, respectively, in order to generate output voltages on the output nodes. The parametric test system may compare the output voltages with a plurality of high and low reference levels to determine ranges of the output voltages. The ranges may be used to determine whether the I/O driver circuits pass the Vand Vtest requirements. The V/Vtest system may be implemented on-chip with other components of the external device, which may eliminate the need to perform other parametric testing with external test equipment.

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A non-volatile memory system may include detection circuitry configured to detect that a host system is configured to initially communicate a clock signal and initialization command signals at a voltage level lower than its input/output driver circuit is configured to receive the signals. In response to the detection, the detection circuitry may switch a regulator circuit from a high voltage mode to a low voltage mode so that the input/output driver circuit is ready to receive the initialization commands at the lower voltage level.

Low voltage detection and initialization for non-volatile memory systems

An electronic device may receive a supply voltage from another external device, and detect when a level of the supply voltage drops below a threshold. In response, a controller of the electronic device may deactivate an interface configured for communication with the other electronic device. The controller may manage time periods and time period counters to determine when the check whether to reactivate the interface or conclude that the other external device is non-compliant.

Device soft-start management for enumeration problems with USB hosts

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Bengaluru, India

Jayanth Mysore Thimmaiah