Lara Technology, Inc.

Utstarcom, Incorporated

Yume Networks, Inc.

Jayan R Ramankutty

Ajit K Medhekar

James G Washburn

Eric H Voelkel

James Washburn

Ayyappan Sankaran

Jayant Kadambi

Gary Tsztoo

Neal A Schneider

A method and a system for securely transmitting a digital content in a digital right management (DRM) network, the method comprising partitioning the digital content into a plurality of fragments. The method further comprises associating each fragment with a license key. Each fragment is encrypted with the corresponding license key and are sent to an electronic device in response to receiving a request for the digital content.

Method and system to enable continuous monitoring of integrity and validity of a digital content

According to one embodiment, a system ( ) includes a content addressable memory (CAM) address system ( ) that receives voice packet data, and in response thereto, generates a channel number value (CHANNEL&num;). The CHANNEL&num; value can be used to generate a base address value for a voice packet buffer memory system ( ). A base address value will correspond to a particular voice channel. The use of the CAM address system ( ) can enable processing of voice data packets &ldquo;on-the-fly,&rdquo; allowing for rapid processing of voice data transmitted over a network structure and/or result in more efficient use of a buffer memory that stores voice data.

Method and apparatus for transmission of voice data in a network structure

A CAM cell array ( ) that can provide a longest prefix matching operation without necessarily requiring data values to be stored in a particular order. A comparand value can be applied to a CAM cell array ( ) to generate ternary match indications. The mask/prefix data values of ternary match indications can be combined to generate a longest prefix value. The longest prefix value can be compared with the mask/prefix data values of the ternary match indications to indicate a data value having a longest prefix match with the comparand value.

Content addressable memory having longest prefix matching function

A ternary CAM ( ) includes a CAM cell array ( ) arranged into groups ( - to - ) for storing data values having a predetermined prefix length. The groups ( - to - ) are arranged in an order that allows for longest prefix match searches. A prefix length translator ( ) can receive prefix length values and translate them into corresponding CAM cell array addresses (CAM_ADD). Thus, a prefix value and corresponding data value can be applied to the CAM ( ) and the data value can be written into the group ( - to - ) corresponding to its prefix length. In this way, a table update operation can be performed without having to reorder entries in the ternary CAM ( ).

Method and apparatus for ordering entries in a ternary content addressable memory

A modified binary content addressable memory (CAM) (,) having a fast variable prefix matching capability is disclosed. The modified CAM (,) includes modified CAM cells (,(,) to,(n,m)), each of which includes a store/compare circuit (,(,) to,(n,m)) for storing a data value and comparing the data value to a comparand value. In addition, each modified CAM cell (,(,) to,(n,m)) further includes a multiplexer (MUX) circuit (,(,) to,(n,m)). Each MUX circuit (,(,) to,(n,m)) receives a non-shifted comparand value from a modified CAM cell of a previous row and same column, and a shifted comparand value from a modified CAM cell of the previous row and an adjacent column. The MUX circuits (,(,) to,(n,m)) enable a comparand value to be shifted as it is applied to consecutive data values.

Enhanced binary content addressable memory for longest prefix address matching

A ternary content addressable memory (CAM) (800) having a massive, parallel shift capability is disclosed. The CAM (800) includes an array of CAM cells (802(1,1) to 802(1,4)), each of which includes a data value register (804(1,1) to 804(1,4)) and a mask value register (806(1,1) to 806(1,4)). To enable parallel shifting between a CAM cell in one row with a corresponding CAM cell in a higher row, each data value register (804(1,1) 804(1,4)) and mask value register (806(1,1) to 806(1,4)) includes an upper data input (UD) coupled the output of a CAM cell in the higher row. To enable parallel shifting between a CAM cell in one row with a corresponding CAM cell in a lower row, each data value register (804(1,1) 804(1,4)) and mask value register (806(1,1) to 806(1,4)) includes a lower data input (LD) coupled the output of a CAM cell in the lower row.

Growing community of inventors

Fremont, CA, United States of America

Jayan R Ramankutty