Microsoft Technology Licensing, LLC

Facebook Technologies, LLC

Jay Shih Tsao

Robert Allen Shearer

Eric Oliver Mejdrich

Russell Dean Hoover

Jonathan Kent Ross

Gregory Mayo Daly

Neeraj Upasani

Peter Anthony Atkinson

Michael Grassi

James Adam Hunter

Marco Brambilla

Disclosed herein is a modular computing device that provides a user options to upgrade an existing computing device as improved expansion units become available without rendering the underlying base unit obsolete. The base unit of the modular computing device receives high-voltage AC power and one or more power supplies within the base unit converts the AC power to low-voltage DC power that is consumed within the base unit. An AC power transfer unit transfers AC power from the base unit to an expansion unit installed within an expansion dock of the base unit. One or more power supplies within the expansion unit convert the received AC power to low-voltage DC power that is consumed within the expansion unit.

Modular computing device with common AC power

In general, this disclosure describes techniques for using a random number generator to affect the lengths of clock cycles in a clock waveform that drives the timing of operations performed by processing circuitry. In one example, the processing circuitry includes a central processing unit and a clock generator. The clock generator is configured, upon receiving an indication of a boot command for the processing circuitry, generate a random number using a true random number generator and generate, based at least in part on the random number, an output clock waveform indicating at least a length of a clock cycle for the central processing unit. The central processing unit is configured to execute a boot sequence for at least the processing circuitry using the output clock waveform.

Randomized clock cycle lengths for boot sequences

Input power sequencing implementations for electronic, processing, and computing systems are presented herein. In one example, a method of providing power to operational elements of an electronic system is provided. The method includes maintaining sequencing information for the operational elements that indicates relative priorities and inrush delays for each of the operational elements. Responsive to ones of the operational elements requesting transition to a powered state, the method includes placing at least indications of the ones of the operational elements into a queue, establishing a power sequencing process for servicing the queue based at least on the sequencing information associated with the operational elements in the queue, and initiating the power sequencing process to provide input power to the operational elements in the queue.

Prioritized sequencing of device inrush current

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Kirkland, WA, United States of America

Jay Shih Tsao