National Semiconductor Corporation

Jay Deng

Allan Lin

Jules Joseph Jelinek

A data source circuit and a complementary data recovery circuit which can transmit and receive data at a higher rate than a conventional data source circuit which uses similar fabrication technology. A data source circuit of the present invention has an input for receiving a periodic source clock signal having a period T; a synchronization signal generator for generating, based on said downstream-clock signal, a series of one or more periodic synchronization signals having periods substantially equal to T, each synchronization signal being delayed from a previous synchronization signal; and a transmitter for transmitting one or more sub-words of a multi-bit data word, each sub-word having one or more bits, separate ones of said one or more sub-words being transmitted responsive to separate progressively delayed combined pairs of said synchronization signals. In a preferred embodiment of the present invention particularly suited for use in a point to point (e.g. a ring-type) data network, a recovery circuit and a source circuit are integrated as a receiver/retransmission node.

Source synchronized data transmission circuit

A data source circuit and a complementary data acquisition circuit which can transmit and receive data at a higher rate than a conventional data source circuit which uses similar fabrication technology. A data source circuit of the present invention has an input for receiving a periodic source clock signal having a period T; a synchronization signal generator for generating, based on said downstream-clock signal, a series of one or more periodic synchronization signals having periods substantially equal to T, each synchronization signal being delayed from a previous synchronization signal; and a transmitter for transmitting one or more sub-words of a multi-bit data word, each sub-word having one or more bits, separate ones of said one or more sub-words being transmitted responsive to separate progressively delayed combined pairs of said synchronization signals. In a preferred embodiment of the present invention particularly suited for use in a point to point (e.g. a ring-type) data network, an acquisition circuit and a source circuit are integrated as a receiver/retransmission node.

A voltage controlled oscillator (VCO) provides an output signal with an output frequency that varies only minimally for any given input control voltage despite variations in the manufacturing process, temperature and supply voltage. The VCO also includes a multistage ring oscillator which includes a plurality of series-connected current-starved inverter stages. The VCO utilizes a first current source to provide a substantially constant current independent of process, temperature and supply voltage and a second current source to provide a variable current that varies in response to process, temperature and supply voltage. Both current sources generate a respective current signal independent of the input signal to the VCO. An attenuator, responsive to the VCO's input voltage signal (typically from a phase-locked loop filter) provides a control current signal to the ring oscillator. The attenuator receives a supply current created by subtracting the second current from the first current, and utilizes a differentiation subcircuit that attenuates the supply current in response to changes in an input voltage to produce a current control signal that sets the current level in the ring oscillator's cells. The frequency of oscillation of the ring oscillator is determined by the control current signal. Additionally, the VCO circuit may include a current mirror for receiving the control current signal from the attenuator and mirroring the control current signal to the ring oscillator.

Growing community of inventors

Union City, CA, United States of America

Jay Deng