Tandem Computers Incorporated

Jay A Zwagerman

Yie-Fong Dan

Geoffrey I Iswandhi

Kenneth K Chan

Martin W Sanner

Wing M Chan

A Richard Zacher

James E Korpi

Duc Manh Hoang

Reeves, Larry D

Steven G Silverman

Zubair Hussain

David L Bernick

James E Smith

Francis J Dwan

In a digital computer system which employs a plurality of host processors, at least two system buses and a plurality of peripheral input/output ports, an input/output system is provided whereby ownership of the input/output channels is shared. The device controller employs a first port controller having a first ownership latch, a second port controller having a second ownership latch, a first bus, a dedicated microprocessor having control over the first bus (the MPU bus), a second, higher-speed bus, a multiple-channel direct memory access (DMA) controller which is a state machine which controls the second bus (the data buffer bus), a bus switch for exchanging data between buses, a multiple device peripheral device interface, namely a Small Computer System Interface (SCSI), and at least provision for interface with data communication equipment (DCEs) or data terminal equipment (DTEs). The DMA controller arbitrates data bus usage and can allocate alternate bus clock cycles in response to requests to exchange data and is capable of supporting overlapping transfers. The microprocessor is allowed access to the data buffer bus only if the data buffer bus is not in use for data transfer. The latches associated with each port grant ownership to either port or both ports allowing data exchange between addressed peripheral devices and requesting ports.

Input/output system for multiprocessors

An electrical keying system for a set of incompatible module pairs to prevent powerup of an electrically incompatible module pair in a set.

Electrical keying for replaceable modules

A fault tolerant/failsafe current limit system for shutting down a power supply if an overcurrent condition exists at one or more selected load circuits in a set of load circuits. A current limit circuit couples each selected load circuit to the power supply and includes at least two monitoring circuits for detecting whether the current delivered to the selected load circuit exceeds a preselected limit. The power supply will be shut down unless both monitor circuits agree that the delivered current does not exceed the preselected limit.

Fault tolerant/failsafe current unit

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Saratoga, CA, United States of America

Jay A Zwagerman