Intel Corporation

Javier Soto

Adel A Elsherbini

Aleksandar Aleksov

Feras Eid

Henning Braunisch

Zhichao Zhang

Mathew J Manusharow

Krishna Bharath

Yidnekachew S Mekonnen

Debendra Mallik

Robert M Nickerson

Charan K Gurumurthy

Brandon M Rawlings

Embodiments of the invention include a packaged device with transmission lines that have an extended thickness, and methods of making such device. According to an embodiment, the packaged device may include a first dielectric layer and a first transmission line formed over the first dielectric layer. Embodiments may then include a second dielectric layer formed over the transmission line and the first dielectric layer. According to an embodiment, a first line via may be formed through the second dielectric layer and electrically coupled to the first transmission line. In some embodiments, the first line via extends substantially along the length of the first transmission line.

Low loss and low cross talk transmission lines with stacked dielectric layers for forming stubs of different thickness or for forming a coaxial line

Low loss and low cross talk transmission lines having l-shaped cross sections

Packaged device including a transmission line associated with one of a conductive shield, vertical stubs, and vertically interdigitated stubs

Embodiments of the invention include conductive vias and methods for forming the conductive vias. In one embodiment, a via pad is formed over a first dielectric layer and a photoresist layer is formed over the first dielectric layer and the via pad. Embodiments may then include patterning the photoresist layer to form a via opening over the via pad and depositing a conductive material into the via opening to form a via over the via pad. Embodiments may then includeremoving the photoresist layer and forming a second dielectric layer over the first dielectric layer, the via pad, and the via. For example a top surface of the second dielectric layer is formed above a top surface of the via in some embodiments. Embodiments may then include recessing the second dielectric layer to expose a top portion of the via.

Lithographacally defined vias for organic package substrate scaling

Low loss and low cross talk transmission lines using shaped vias

A microelectronic device includes a laminated mounting substrate including a die side and a land side with a surface finish layer disposed in a recess on the mounting substrate die side. An electrically conductive first plug is in contact with the surface finish layer and an electrically conductive subsequent plug is disposed on the mounting substrate land side and it is electrically coupled to the electrically conductive first plug and disposed directly below the electrically conductive first plug.

Processes of making pad-less interconnect for electrical coreless substrate

Growing community of inventors

Chandler, AZ, United States of America

Javier Soto