Stmicroelectronics International N.v.

Jatin Fultaria

Harsh Rawat

Tanmoy Roy

Nitin Jain

Swapnil Bahl

Amit Chhabra

A circuit includes an input node configured to receive a test address input signal and circuitry configured to generate, from a first part of the test address input signal, a first address signal that selects a first address of a first part of a circuit to be tested and further generate, from a second part of the test address input signal, a second signal configured to select a second part of the circuit to be tested. Test circuitry is then configured to use the first address and the second part in a test mode.

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Rajkot, India

Jatin Fultaria