Kyocera Avx Components (San Diego), Inc.

Avx Antenna, Inc.

Entropic Communications, Inc.

Mobius Semiconductor, Inc.

Jatan Shah

Michael Roe

Amin Shameli

Hamid Eslami

Claudio Anzil

Jesse Shih-Chieh Hsin

Syed Khursheed Enam

Rozi Rofougaran

Howard A Baumer

A system for communicating data over a transmission line is disclosed. In one example implementation, the system may include a transmitter configured to modulate a control signal onto an RF signal using amplitude-shift keying modulation to generate a transmit signal. The system may include a receiver and a transmission line coupling the transmitter to the receiver. The transmitter may be configured to transmit the transmit signal over the transmission line to the receiver, and the receiver may be configured to de-modulate the control signal and extract clock information associated with the transmitter. In some embodiments, the system may include a tuning circuit and a modal antenna, and the tuning circuit may be or include the receiver. The receiver may be configured to adjust a mode of the modal antenna based on the control signal transmitted by the transmitter.

Method and system for controlling a modal antenna

An antenna system is provided. In one example implementation, the antenna system may include a modal antenna that is operable in a plurality of different modes, and each mode may be associated with a different radiation pattern. The antenna system may include a tuning circuit configured to operate the modal antenna in the plurality of different modes. A transmission line may couple a radio frequency circuit to the modal antenna. The radio frequency circuit may be configured to modulate a control signal onto an RF signal using amplitude-shift keying modulation to generate a transmit signal for communication over the transmission line to the tuning circuit. The tuning circuit may be configured to demodulate the control signal such that the radio frequency circuit can adjust a mode of the modal antenna via the control signal. In some embodiments, the amplitude-shift keying modulation may include on-off keying modulation.

Systems and methods for transmitting data having a rate indicated by an associated clock signal, using a fixed rate transmission system are disclosed. One embodiment of the invention includes an unknown rate to fixed rate transmitter configured to receive unknown rate data and a clock signal that indicates the rate of the unknown rate data, and to transmit data at a fixed rate over a fixed rate link, a fixed rate to unknown rate receiver configured to receive fixed rate data including the unknown rate data via the fixed rate link, and to transmit the unknown rate data, and a recovered clock signal. In addition, the unknown rate to fixed rate transmitter is configured to insert idle data between the fixed rate data so that transmitting the combined unknown rate and idle data at the fixed rate over the fixed rate link results in the unknown rate data being transmitted over the fixed rate link at a rate corresponding to the rate indicated by the clock signal, and the fixed rate to unknown rate receiver is configured to accumulate the unknown rate data and generate a recovered clock signal based upon the rate at which the unknown rate data is accumulated by the fixed rate to unknown rate receiver.

Unknown rate clock recovery from fixed rate transmission system

Low jitter clock interpolator circuits in accordance with embodiments of the invention are illustrated. In many embodiments, the low jitter clock interpolator incorporates a time based numerically controlled oscillator (NCO) to generate a clock signal, and different phases of the resulting clock are created using a clock interpolator. Information from the time based NCO and the interpolator is then used to select phases and create an output clock that is jitter free within the precision of the interpolator. One embodiment of the invention includes a time based numerically controlled oscillator (NCO) configured to produce a NCO output in response to a high speed clock (hsclk) input and a frequency control word (FCW), where the output periods of the NCO output are integer multiples of the hsclk period and the average output period of the NCO output corresponds to the FCW, a clock interpolator circuit configured to receive the NCO output and the hsclk input and to generate a plurality of different phases of the NCO output, and a phase calculator circuit configured to select phases generated by the clock interpolator to produce a low jitter clock signal output having an output period that corresponds to the FCW.

Low jitter clock interpolator

Growing community of inventors

Irvine, CA, United States of America

Jatan Shah