Qualcomm Incorporated

Other

Avago Technologies General IP (singapore) Pte. Ltd.

Avago Technologies General IP Pte, Ltd.

Jason R Gonzalez

Lior Amarilio

Zhi Zhu

Fifin Sweeney

Lew G Chua-Eoan

Sharon Graif

Junmou Zhang

Vannam Dang

Yuan-cheng Christopher Pan

Puxuan Dong

Systems and methods for fast activation of slaves during wake up in an audio system allow a master device in an audio system such as a SOUNDWIRE audio system to send system and/or topology information to capable slave devices during a wake up window so that the slaves may start in an active mode rather than a safe mode. In the most recent proposed versions of SOUNDWIRE, there is a check PHY_Num phase. The systems for fast activation of slaves cause a negative differential line to be driven with an encoded signal by the master during a check PHY_Num phase where the encoded signal indicates a fast mode speed. Capable slaves may then begin in a fast mode rather than a safe (and slow) mode. Latency may be reduced by starting in a fast mode, which may improve the user's audio experience.

Fast activation during wake up in an audio system

Systems and methods for multi-threshold sensing at an audio receiver, and systems and methods for calibrating an audio system to optimize for the specific configuration of the audio system are disclosed herein. In some implementations of a multi-threshold receiver, at least one additional voltage level is selected to trigger latching events within the receiver based on changes of the receiver input (which includes differential signals Vp and Vn) and in turn, to generate internal signals within the multi-threshold receiver, and then logic operations are performed on these internal signals to generate the output of the multi-threshold receiver.

Receiver and decoder for extreme low power, unterminated, multi-drop serdes

A stacked integrated circuit includes a first tier IC and a second tier IC. Active faces of the first tier IC and the second tier IC face each other. An interconnect structure, such as microbumps, couples the first tier IC to the second tier IC. An active portion of a voltage regulator is integrated in the first semiconductor IC and coupled to passive components (for example a capacitor or an inductor) embedded in a packaging substrate on which the stacked IC is mounted. The passive components may be multiple through vias in the packaging substrate providing inductance to the active portion of the voltage regulator. The inductance provided to the active portion of the voltage regulator is increased by coupling the through via in the packaging substrate to through vias in a printed circuit board that the packaging substrate is mounted on.

Integrated voltage regulator with embedded passive device(s) for a stacked IC

A method includes receiving an input clock signal at a programmable buffer. The method further includes filtering an output signal from the programmable buffer to generate a filtered signal having a voltage level, where the voltage level indicates a duty cycle of the output signal. The method further includes comparing the voltage level to a reference voltage. The method further includes modifying at least one operating parameter of the programmable buffer to adjust the duty cycle of the output signal.

System and method of adjusting a clock signal

A method includes detecting one or more of an upward transition of a single-ended data signal via a first driver path to a pre-emphasis transmitter or a downward transition of the single-ended data signal via a second driver path to the pre-emphasis transmitter. The method also includes generating a pre-emphasis pulse at the pre-emphasis transmitter in response to detecting the upward transition or the downward transition of the single-ended data signal.

System and method of generating a pre-emphasis pulse

A package includes a printed circuit board (PCB) having a first side and a second side and a thickness between the first side and the second side and a stacked die including a top die mounted on a bottom die, the bottom die being at least partially embedded in the PCB. Also a method of forming a package that includes forming an opening in a top surface of the PCB layer, placing a stacked die including a top die stacked on a bottom die into the opening, laminating the PCB layer to form a laminate layer, and forming an electrical connection with the stacked die.

Printed circuit board having embedded dies and method of forming same

A Serializer/Deserializer apparatus comprises a serializer adapted to take N parallel bits of data and shifts them out serially at N times a clock speed to a transmitter, a transmitter enable block adapted to start the serializer means, and a count block. The serializer comprises flip-flops and muxes, and is adapted to N parallel bits of data and shifts them out serially at N times a clock speed to a transmitter. The transmitter enable block comprises an inverter and flip-flops, and is adapted to start the serializer. The transmitter enable block comprises an inverter, flip-flops, and a NOR gate, and is adapted to create a waveform which programs data loading in the serializer.

High speed serializer/deserializer transmit architecture

An improved wheelbarrow featuring a retractable configuration that permits ready emptying of a wheelbarrow receptacle, with reduced need to tilt, lift or invert the wheelbarrow. A wheelbarrow is disclosed with a retractable configuration that is optionally operable by the user to create an egress for wheelbarrow cargo.

Wheelbarrow with retractable configuration

A novel method is presented for mapping a signal driver of an integrated circuit to one of a plurality of interconnect pads. The output impedance of the signal driver and desired slew rate for a signal generated by the signal driver is used to calculate a desired characteristic capacitance to provide a resulting characteristic time constant required to achieve the desired slew rate on a transmission line connected to receive the signal. The characteristic capacitance associated with each at least one possible interconnection path between the driver and pad is estimated, and one of the interconnection paths whose associated characteristic capacitance is substantially equal to the desired characteristic capacitance is selected, and the output driver is then mapped to the pad associated with the selected interconnection path.

Redistribution metal for output driver slew rate control

An integrated circuit (IC) measures a voltage at an interface of the IC. The IC comprises voltage reference, comparator, and control circuits. The voltage reference circuit provides reference voltages responsive to a control input. The comparator circuit compares a first reference voltage with a voltage at the interface. The control circuit receives an output of the comparator and adjusts the control input to provide a second reference voltage closer to the voltage at the interface. A method for measuring voltage at an IC interface comprises generating a first reference voltage, monitoring the voltage at the interface from within the IC, comparing the first reference and interface voltages, generating a second reference voltage responsive to a result of the comparing, replacing the first reference voltage with the second reference voltage, and repeating until an applied reference voltage is substantially equal to the voltage at the interface.

Testing input/output voltages in integrated circuits

A CMOS switching circuit that includes a charge reservoir and a multiplexer connected to the charge reservoir. The multiplexer receives control signals from a delay line and a control signal line, and it delivers a switching signal to an output terminal. A first set of signals delivered to the control terminals of the multiplexer causes the charge reservoir to deliver charge to the output terminal, and a second set of signals delivered to the control terminals causes charging of the charge reservoir. With the charge reservoir, charge from falling signals is conserved and used to help rising signals at the output, reducing the power required to provide an output switching signal.

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San Diego, CA, United States of America

Jason R Gonzalez