Dell Products Inc.

Emc Corporation

Jason Pritchard

Stephen Edward Strickland

Michael Robillard

Charles W Ziegler, Iv

Lynn Lingyu Kong

Himanshu Agrawal

Charles William Ziegler

Daniel Alvarado

Robert M Beauchamp

Andy Qiang Liu

Jason Stock

Lingyu Kong

Raymond Pavlak, Jr

Marlon Ramroopsingh

Qianwen Wang

James E Roche

Rohit Mundra

Michael Gnieski

Chambers Yin

Jeremy Qiu

Venkat Raghavan Satagopan

A power delivery system, including: a computing module having: a top surface including a first contact pad; a rail system including a first rail, wherein the first rail includes: a first end opposite to a second end; a first slot extending between the first end and the second end of the first rail, the first slot including a first surface positioned opposite to a second surface, the first surface of the first rail including a first contact finger; wherein, when the computing module is coupled to the rail system: the top surface of the computing module contacts the first surface of the first slot such that the first contact pad of the computing module contacts the first contact finger of the first rail to transfer power from a first power cable through the first contact finger to the first contact pad of the computing module.

Power delivery system

A computing card for an information handling system, the computing card system including a computing card, including: a first side including: a first body surface, the first body surface including a first plurality of conductive pads configured to connect respectively with a first set of pins of a computing card receptacle; a first indented surface configured to connect with a second set of pins of the computing card receptacle; a first connecting surface defined between the first body surface and the first indented surface; a bottom surface; and a plurality of internal layers, wherein one or more of the internal layers are exposed at the first indented surface, and are connected to the bottom surface.

Computing card system with accessible internal layers and edge interconnects for an information handling system

A circuit board may include a traditional via electrically coupled to a first layer of the circuit board and coupled to a second layer of the circuit board and a slotted via formed within the circuit board proximate to the traditional via, the slotted via comprising an opening through a first surface and a second surface of the circuit board and a layer of conductive material formed on interior walls of the opening.

Slotted vias for circuit boards

A printed circuit board of an information handling system includes a dielectric layer, adjacent differential pairs, a ground layer, and a ground wall. The adjacent differential pairs are plated on the dielectric layer, and generate crosstalk between each other. The ground wall is in physical communication with and electrically coupled to the ground layer. The ground wall extends substantially perpendicular from the ground layer through the dielectric layer. A top surface of the ground wall is a specific height above a top surface of the adjacent different pairs. The ground wall suppresses the generated crosstalk based on the specific height and a width of the ground wall.

Crosstalk suppression microstrip line

An information handling system includes first and second printed circuit boards (PCBs), and first and second connectors. The first PCB includes a first top surface, a first bottom, and a first plurality of side surfaces extending between the first top and first bottom surfaces. The first connector is embedded within the first PCB, and extends from the first bottom surface toward the first top surface. A first height of the first connector is substantially equal to a first thickness of the first PCB. The second PCB includes a second top surface, a second bottom, and a second plurality of side surfaces extending between the second top and second bottom surfaces. The second connector is embedded within the second PCB, and extends from the second bottom surface toward the second top surface. A second height of the second connector is greater than a second thickness of the second printed circuit board.

Information handling system with a printed circuit board having an embedded interconnect

A system for data communications, comprising an upstream component configured to select an in-band peripheral component interconnect express (PCIe) equalization procedure or an out-of-band PCIe equalization procedure and a downstream component configured to respond to the selected one of the in-band PCIe equalization procedure or the out-of-band PCIe equalization procedure to enable PCIe communications with the upstream component.

Adaptive transmitter preset mechanism in PCIe link equalization procedure

Systems and methods that may be implemented to provide on-board trace impedance testing for a system level board of an information handling system. A printed circuit board (PCB) of the system level board may include built-in test trace circuitry that may be used to measure board trace impedance so that the trace impedance of a fully assembled system level board may be tested and verified for compliance with trace impedance specification, and without requiring any disassembly of the board.

Systems and methods for in-silicon measurement of printed circuit board (PCB) trace impedance

A computer-executable method, apparatus, or computer program product for automating the analysis of interconnects used with data storage systems, where one or more measured parameters, such as an S-parameter, may be used to determine signal characteristics of the interconnects.

S-parameter analysis tool

A data preservation device includes a circuit board configured to be positioned within a memory module slot of a computing device and releasably engage a memory bus of the computing device. A non-volatile memory storage device is electrically coupled to the circuit board. A control circuit is electrically coupled to the circuit board and is configured to read a data portion from the computing device and write the data portion to the non-volatile memory storage device during the occurrence of a power failure event on the computing device. An independent power supply is configured to power the data preservation device during the power failure event.

Data preservation system and method

A link control card for disk drives. The link control card includes: a first connector for carrying relatively high frequency user data and low frequency signals; a diplexer connected to the connector, such diplexer having a first port for the high frequency user data and a second port for the low frequency signals; an optical connector for carrying the relatively high frequency user data; and a high frequency user data communication channel disposed between the diplexer and the disk drives for selectively connected either the first port of the diplexer or the optical connector to the disk drives.

Data storage system having optical/non-optical communication LCC

A system for powering on downstream devices includes a master device; a first slave device; and a first communication link connecting the master device to the slave device for enabling the master device to transmit data signals to the slave device. The master device includes a power-on signal generator for injecting a power-on signal onto the communication link and the first slave device includes a power-on signal receiver for detecting the power-on signal injected on the communication link by the power-on signal generator and powering on the first slave device.

Automatic power-on system and method using high-speed communication line

A differential signal via structure for a printed circuit board having a pair of signal vias extending vertically from a surface of the board to an interior region of the board to contact signal conductors disposed horizontally within the interior region of the board and a pair of ground vias extending vertically from a surface of the circuit board to an interior region of the board to contact ground conductors disposed horizontally within the interior region of the board.

Compact differential signal via structure

A technique generates circuit board modeling data for a circuit board structure having multiple layers. The technique includes receiving a set of global circuit board dimension parameters from a user. The set of global circuit board dimension parameters defines a set of global circuit board dimensions of the circuit board structure. The technique further includes forming, for each layer, a set of individual circuit board dimension parameters defining a set of individual circuit board dimensions for that layer based on the set of global circuit board dimension parameters. The technique further includes providing a script for use by a 3D modeling subsystem. The script includes a set of circuit board design values based on the set of individual circuit board dimension parameters formed for each layer. Other properties such as layer width and thickness, via dimensions, etc. are handled in a similar manner.

Techniques for modeling a circuit board structure

A differential signal probe-differential signal launch structure wherein the conductive outer housing of the differential signal probe is disposed on and electrically connected to a conductive ground pad disposed on a printed circuit board. A vertically extending ground via is provided with the conductive pad being electrically connected to the horizontally ground plane conductors through the vertically extending ground via.

Growing community of inventors

Hopkinton, MA, United States of America

Jason Pritchard