Cirrus Logic Inc.

Other

Jason Powell Rhode

John L Melanson

Johann Guy Gaboriau

Xiaofan Fei

Steven Green

John James Paulos

Eric Walburger

Vishnu Shankar Srinivasan

Andrew W Krone

Wilson E Taylor, Jr

Brian David Trotter

Richard Bocock

John Paul Lesso

Karl Ernesto Thompson

Timothy Thomas Rueger

Nadi Rafik Itani

Aryesh Amar

Trenton John Grale

Heling Yi

Eric Clay Gaalaas

Thomas D Stein

Evan Logan Marchman

A method of biometric identification of a person comprises, during an enrolment phase determining at least one enrolment transfer function for bone conduction of an audio signal through an enrolling user's head. The enrolment transfer function is stored. During a verification phase, at least one verification transfer function for bone conduction of an audio signal through the person's head is determined. It is then determined from the at least one verification transfer function and the at least one enrolment transfer function whether the person is the enrolling user.

Biometric identification

A thermal sensor at the output of a switching amplifier senses heat dissipation at the output switch. If an overheating condition is sensed, gain of the digital input signal is lowered to reduce output power of the audio output signal.

Thermal feedback for switch mode amplification

A data converter including a digital volume control for continuously scaling a received stream of digital audio data by a selected factor and a low noise delta-sigma modulator for re-quantizing a scaled digital data stream output from the digital volume control.

Circuits, systems and methods for volume control in low noise 1-bit digital audio systems

A method of amplitude control in a 1-bit digital system includes the step of scaling the stream of 1-bit data by a scaling factor corresponding to a selected output amplitude. The scaled data is modulated and the resulting modulated, scaled data is converted from digital to analog form.

A quasi-differential power amplifier and method are disclosed that enhance drive capability and dynamic range by driving a right, left and common terminals with a right channel output signal, a left channel output signal, and a common mode output signal that are each a combination of the left and right channel input signals. In addition, the common mode output signal may be used as feedback so that the left and right channel output signals so that these signals are dependent upon feedback from the common mode output signal. The quasi-differential power amplifier may include a first amplifier driving the left channel output signal, a second amplifier driving the right channel output signal, and a third amplifier driving the common mode output signal. In one application, the quasi-differential amplifier may be used to drive three-wire stereo headphones for use in small portable stereo systems.

Quasi-differential power amplifier and method

Methods and apparatus are provided for receiving DSD data in phase modulation mode using a single clock signal. Either the bit clock or phase signal may be used.

Single clock data communication in direct stream digital system

A gain control at the input monitors an input signal and a supply voltage, which drives an output. The gain control adjusts the gain to compress the input signal when the supply voltage decreases in magnitude and/or the input signal is of such magnitude to cause the supply voltage to decrease.

Power supply based audio compression for digital audio amplifier

Circuits, Systems, and methods for volume in low noise 1-bit digital audio systems

Circuits, systems and methods for volume control in 1-bit digital audio systems

A data converter includes first and second input signal paths receiving an input signal having an input frequency, the first input signal path dividing the input frequency by a first divisor and the second input signal path dividing the input frequency by a second divisor, the second divisor being greater than the first divisor. A selector selects between an output of the first input signal path and an output from the second input signal path in response to a state of a control signal. Control circuitry monitors a selector output signal frequency and a current state of the control signal and selectively resets the state of the control signal to set the selector output frequency to a desired frequency.

Data conversion circuits and methods with input clock signal frequency detection and master mode output clock signal generation

An analog-to-digital converter is provided for converting multiple analog inputs into corresponding digital values. An output interface circuit uses differential signaling to reduce noise and interference induced in the analog portions of the analog-to-digital converter.

One line data format for audio analog-to-digital converters

Disclosed is a data converter and a method for converting a digital audio stream representing an analog signal that has been sampled at a certain rate. The circuit includes a divider that receives a clock signal associated with the digital audio stream and divides the clock signal by a selectable division factor. The division factor is set according to divider control signals. At the output of the divider is provided an internal clock signal. A frequency detection circuit receives the signal from the output of the divider, and the frequency detection circuit detects the original sampling rate of the audio signal based upon intrinsic characteristics (e.g., MCLK to LRCK ratio) of the digital audio stream. The frequency detection circuit, which may also be used with a separate rate detection circuit to accomplish its function, then generates the divider control signals to the divider to set the division factor in the divider such that the internal clock signal has a known relationship to the original sampling rate based on the sampling mode. A digital processing circuit then receives the internal clock signal from the divider, derives incoming data from the digital audio stream, and generates an output signal.

Frequency detect circuit for determining sample speed mode of decoded audio input data streams

An apparatus and method for converting digital input signals sampled at different rates to analog signals includes a digital to analog converter for each digital input signal. Each digital to analog converter receives a digital input signal and a clock signal corresponding to the sampling rate of the received digital input signal. The apparatus can also receive a set of sample rate signals indicating the sampling rate for each digital input signal. The sample rate signals are used to route each digital input signal, along with a corresponding clock signal, to a corresponding digital to analog converter (DAC). A clock error signal controls routing of the digital input signals to the DACs as well as operation of the DACs. A clock divider and ratio detector module generates the clock error signal based on intermediate clock error signals that correspond to the sample rates.

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Austin, TX, United States of America

Jason Powell Rhode