Oracle International Corporation

Jason Miller

Bikram Saha

Paul Rotker

Systems, methods, and apparatuses for error checking are disclosed. In one embodiment, an error checking system is used on a device that has a plurality of parallel data lanes as inputs. It may be desired to provide an error checking system with sufficient resolution to detect single-bit errors, determine how many bits are in error, and/or determine which bit(s) of a parallel data lane are in error. In one embodiment, the present disclosure provides for switchable error checking through the use of a multiplexor configured to select a particular data lane for error checking. This switchable error checking may provide benefits such as low cost, low power consumption, and/or low size.

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Arlington, MA, United States of America

Jason Miller