Samsung Electronics Co., Ltd.

Jason Martineau

Sompong Paul Olarig

Oscar Prem Pinto

Yang Seok Ki

Changho Choi

Wentao Wu

David Schwaderer

Ramdas P Kachare

Stephen Garry Fischer

Jingpei Yang

Rajinikanth Pandurangan

Yongsuk Lee

Fred Worley

Byounghak Hong

Son Truong Pham

Zhan Ping

Vijay Balakrishnan

Robert Brennan

Kang-Ill Seo

Daewon Ha

Harry Rogers

Seunghyun Song

Hingkwan Huen

Anahita Shayesteh

Manu Awasthi

Yangwook Kang

William David Schwaderer

Janki Bhimani

Yasser Zaghloul

Pratik Mishra

Salvatore Arcuri

A chassis is disclosed. The chassis may include a processor, a switch, and at least one storage device in communication with a remote processor. The storage device may support an active power mode and a low power mode. A response to a Keep Alive (KA) message may be sent to the remote processor on behalf of the storage device when the storage device is in low power mode.

System and method for supporting chassis level keep alive in NVMe-oF based system

Provided is a three-dimensionally (3D) stacked semiconductor chip architecture including a first semiconductor chip including a first wafer, a first front-end-of-line (FEOL) layer provided on a first side of the first wafer, a first middle-of-line (MOL) layer provided on the first FEOL layer, a first back-end-of-line (BEOL) layer provided on the first MOL layer, a first power rail layer provided on a second side of the first wafer, and a second semiconductor chip including a second wafer, a second FEOL layer provided on a first side of the second wafer, a second MOL layer provided on the second FEOL layer, a second BEOL layer provided on the second MOL layer, a second power rail layer provided on a second side of the second wafer, wherein the first power rail layer and the second power rail layer contact each other.

3D stacked chip that shares power rails

According to some example embodiments, a method for providing security to a storage device includes receiving, by the storage device, a public key via a network; sending, by the storage device, the received public key and a proposed configuration corresponding to the storage device to a security manager that resides in a control plane of the network; determining, by the security manager, whether the public key received from the storage device matches a private key available to the security manager; downloading, by the security manager, the proposed configuration to the storage device; determining, by the security manager, if the proposed configuration is successfully downloaded to the storage device; operating the storage device according to the downloaded configuration; and granting, by the security manager, a request to lease the storage device operating in the downloaded configuration for a time interval.

System and method for providing security protection for FPGA based solid state drives

Presented are structures and methods for forming such structures that allow for electrical or diffusion breaks between transistors of one level of a stacked transistor device, without necessarily requiring that a like electrical or diffusion break exists in another level of the stacked transistor device. Also presented, an electrical break between transistor devices may be formed by providing a channel of a first polarity with a false gate comprising a work-function metal of an opposite polarity.

Selective single diffusion/electrical barrier

A data storage device includes: a housing integrating a control logic, a data protection logic, and a non-volatile storage; and a network interface connector integrated to the housing and is configured to be directly inserted into a network switch. The control logic is configured to store a vehicle data including a video stream in the non-volatile storage. The video stream is received from a video camera that is connected to the network switch. The data protection logic is configured to detect a vehicle event and change an operating mode of the data storage device to a read-only mode prohibiting the vehicle data stored in the non-volatile storage from being erased or tampered.

Ethernet-attached SSD for automotive applications

A field programmable gate array (FPGA) may: identify a continuous match of atoms between the search sequence and the reference sequence; divide the search sequence into a left portion of the search sequence that includes atoms before the continuous match of atoms in the search sequence, a center portion of the search sequence that includes the continuous match of atoms in the search sequence, and a right portion of the search sequence that includes atoms after the continuous match of atoms in the search sequence; match the left portion of the search sequence with the reference sequence; and match the right portion of the search sequence with the reference sequence.

Parallelizable sequence alignment systems and methods

A storage device is disclosed. The storage device may include storage to store data, which may include a first storage of a first type and a second storage of a second type. The storage device may support a number of device streams, some of which associated with the first storage and some associated with the second storage. The storage device may also include a streaming capabilities analyzer that may inventory the streaming capabilities for the storage device. Finally, the storage device may include a transmitter to transmit the streaming capabilities of the storage device to a storage manager.

Multistreaming in heterogeneous environments

A method for managing system resources includes receiving, by a storage device, a Quality of Service (QOS) parameter from a host. The storage device selects a first index type, from among index types, for a first index based on the QoS parameter and a computational load metric. The index types include one index type having an index structure that is a tree structure, a list structure, or a hash structure. The index structure is different from an index structure of another index type of the index types. The storage device sends feedback to the host regarding the first index type for the host to use in identifying a second index type for a second index to manage a computational load. The storage device accesses the data using the first index based on a processing of the user request, by the host, using the second index.

System and method for managing a memory device using indexes

Disclosed are systems and methods by which a storage device may process and return I/O commands to a host in the order in which the host provided the commands, thereby reducing host overhead, including but not limited to the following: receiving a first I/O command and a second I/O command, the first I/O command and the second I/O command being assigned a sequence tag, issuing the first I/O command and the second I/O command to one or more storage channels based on their respective sequence tags, collecting a command completion notice of the first I/O command or the second I/O command when the first I/O command or the second I/O command has been respectively completed; and issuing a command completion notification to a host based on the sequence tag of the associated completed first I/O command or the second I/O command.

Write ordering in SSDs

System and method for supporting chassis level keep alive in NVME-of based system

A system and method for supporting data protection across field programmable gate array (FPGA) solid state drives (SSDs) includes a storage system having a first group of solid state drives connected to a FPGA. The FPGA includes a first data protection controller configured to manage input/output requests to and from the first group of solid state disks according to a data protection configuration, generate parity bits according to the data protection configuration, and store the parity bits on at least parity solid state drive from the first group of solid state drives.

System and method for supporting data protection across FPGA SSDs

A computer storage array detects and counters denial of service (DoS) attacks. The computer storage array provides one or more remote initiators with access to one or more storage devices connected to the computer storage array. According to an example embodiment, the computer storage array includes: a computer processor configured to run an operating system for managing networking protocols; a networking device configured to monitor and route network traffic, at a packet level to, and from the storage devices; a baseboard management controller (BMC) configured to detect a DoS attack based on monitoring of statistics of the network traffic by the networking device; a PCIe switch connecting the BMC with each of the storage devices via a PCIe bus; and a computer motherboard to which the computer processor, networking device, BMC and PCIe switch are installed.

System and method of detecting and countering denial-of-service (DoS) attacks on an NVMe-oF-based computer storage array

Growing community of inventors

Milpitas, CA, United States of America

Jason Martineau