Lexmark International, Inc.

Jason Eric Waldeck

Michael Ray Timperman

Toshio Seo

Richard Francis Russell

Charles Thomas Wolfe

Mark Walter Fagan

Lawrence Russell Steward

Heather Laudan Clark

David Zachery Lindsey, Jr

David T Jarvis

William T Warner, Iii

Harold R Combs

Jeffrey J Watrous

Victor Linn Mollett

A method to wirelessly configure a wireless device for wireless communication over a secure wireless network includes placing the wireless device to be configured for communication over the secure wireless network within a wireless communication range of an administrator; establishing a secure wireless communication channel between the administrator and the wireless device; and providing to the wireless device via the secure wireless communication channel network credentials needed to communicate over the secure wireless network.

Method to wirelessly configure a wireless device for wireless communication over a secure wireless network

A method of sharing a printer between a plurality of users on a computer network includes attaching host-based networking hardware to the printer. A network communication protocol defines a command channel and a data channel. Only one of the users is allowed to own the data channel at any single point in time. The host-based networking hardware is instructed to accept information on the data channel only from the user that owns the data channel.

Method of sharing a printer

A method of processing data packets includes receiving a plurality of the data packets at a selected node. Pertinent information in the data packets is extracted. The pertinent information is pertinent to the selected node. A plurality of response data packets are generated based on the pertinent information. The extracting and generating steps are performed without use of a microprocessor.

Device for processing data packets without use of a microprocessor and a memory

A method of obtaining information from a networked device is provided. The method includes the steps of defining a network; providing a network adapter communicatively connected to the network, the network adapter connected to the networked device; providing memory in the network adapter; updating information in the memory, wherein the information describes a status of the networked device; placing the information into a response frame; and sending the response frame in response to any command frame received by the network adapter.

Method and apparatus to obtain real-time status information from a networked device

An improved computing system is provided that includes an embedded PCI device without the use of a PCI bridge to isolate the PCI device from the CPU and the system memory devices. This is accomplished by use of synchronous dynamic RAM (SDRAM) as the main memory device for the CPU, and by providing a PCI/SDRAM logic circuit to control the interfacing of the data and control signals between the PCI device, CPU, and SDRAM device. A combined PCI/Host data bus is provided that connects all of the major system components, including the SDRAM device, the CPU, the PCI device(s), and the PCI/SDRAM logic circuit, thereby eliminating the use of two separate buses found in conventional personal computers. By use of the synchronous DRAM, the present invention provides a much more efficient memory system for interfacing with PCI devices, and thereby dramatically increases the memory bandwidth as compared to conventional computing systems that use asynchronous DRAM.

Bridgeless embedded PCI computer system using syncronous dynamic ram architecture

A method and apparatus for dividing a clock circuit employs a device having a first counting element capable of repetitively incrementing through the first plurality of states and a second counting element, having a second number of states, that generates a second output bit and repetitively increments through the second plurality of states. The first counting element is responsive to the second output bit of the second counting element and the reset signal input of the second counting element is responsive to at least one of the first plurality of output bits so that the second counting element resets to an initial state either when the oscillator signal is asserted and the second counting element counts through each of the second plurality of states or when the oscillator signal is asserted and the reset signal input is asserted and the second counting element has incremented through a preselected number of the second plurality of states. The first counting element increments whenever both the oscillator signal and the enable signal input are asserted. The first counting element and the second counting element, combined, have a predetermined third number of states. A circuit, responsive to the first plurality of output bits from the first counting element and the second output bit from the second counting element, asserts a quasi-periodic pulsed signal during a preselected subset of the third number of states, so that the quasi-periodic pulsed signal has a mean frequency equal to oscillator frequency divided by a fraction.

Method and apparatus for generating a clock signal having a frequency

Disclosed is an improved hardware approach for increasing the efficiency of infrared asynchrounous communication performance. By utilizing the Infrared Data Association's Serial Infrared Link Access Protocol (IRLAP) along with hardware assist, and DMA associated with most microprocessors, e.g. conventional PC's, the processor is free to carry out other functions without having to process the IR communications for both transmit and receive.

Growing community of inventors

Lexington, KY, United States of America

Jason Eric Waldeck