Sun Microsystems, Inc.

Jason Eisenberg

Spencer Montgomery Gold

Julie M Staraitis

Marc E Lamere

Micah C Knapp

A method and apparatus is provided for restoring a free physical register list to its previous state without having to physically restore any data. The method and semiconductor device utilizes sets of pointers to manage physical register pointers in the physical register list. The physical register list is able to independently track physical registers for multiple threads of a multithreading microprocessor.

Flushable free register list having selected pointers moving in unison

A memory array or structure and method for decoding a read address to facilitate simultaneous reading of successive rows. The memory includes row decoders in the form of decoding logic for enabling multiple rows of the memory structure to be read in response to a single row address. The memory structure helps to reduce the number of ports that are required for the memory structure and, thus, reduces the die area occupied by the memory structure. The row address may be divided into most significant bits and least significant bits. Further, the decoding logic may decode the most significant bits differently from the least significant bits when processing the row address. The most significant bits may be preprocessed or predecoded into a fully decoded format while the least significant bits may be decoded into a priority decoded format.

Method and system for decoding a row address to assert multiple adjacent rows in a memory structure

A memory array includes a plurality of memory cells logically arranged in M rows and N columns, wherein N is the number of memory cells per word of digital information and M is the number of words within the array. A plurality of N data output lines are associated with each of the N columns of the array for selectively retrieving output data from a word located at a predetermined word address in the array. Each data output line is selectively shared by each of the M memory cells within its associated column. Each of the cell output lines of the M memory cells in each of the N columns are logically OR-ed together to provide the output data retrieved by each data output line associated with each of the N columns.

System and method for accessing a memory array which tolerates non-exclusive read select enables

A memory cell is provided to store a speculative data value until either a later speculative data value is generated or until the stored speculative data is determined to be the desired data, e.g. no longer speculative. At such time, the invention allows the stored speculative data to quickly and easily be stored as permanent data and further speculative data values to be stored.

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Mountain View, CA, United States of America

Jason Eisenberg