Texas Instruments Corporation

Jason Douglas Kridner

Roshan J Samuel

Gene A Frantz

Stephen John Fedigan

Thomas N Millikan

Pedro Ramon Gelabert

Jeffrey Scott Hayes

William E Cammack

Gabriel Dagani

Mark Nadeski

Timothy C Hankins

Daniel S Jochalson

Christopher A Scarr

A volume level and crossfade controller with programmable fades and audio stream priority controls saturation for a multiple audio stream mixer. Start of fade and end of fade events trigger updates of relative volume level targets and volume ramps.

Multi-stream audio level controller

The specification discloses a system and related method for retrieving encoded media content, such as retrieving audio tracks from a CD in MP3 format. The system involves attaching indicia to the media, or possibly a case or protective cover of the media, which uniquely identifies the content. An encoding retrieval and playback device has the ability to obtain the unique number identified by the indicia, where obtaining the unique number may be a consumer entering the number, may be by reading a barcode label, may be by reading the number from a radio frequency device and the like. Once the unique number has been obtained, the encoding retrieval and playback device retrieves the encoded media content from a server across a network connection. In this manner, a consumer need only be present to initiate the retrieval process, and the retrieval of the encoded media content may be completed without the presence of the consumer, and without inserting the storage media in the playback device.

Method and apparatus for identifying and retrieving media content

An authorization control circuit () comprises a digital signal processor () operable to provide digital data output, determine an authorization state, and generate a disable signal. A digital to analog converter () is coupled to the digital signal processor () and is operable to receive the digital data output. The digital to analog converter () generates analog data in response to the digital data output and is operable to output the analog data and mute the output of analog data. The digital to analog converter () includes an input () operable to receive the disable signal. The digital to analog converter () mutes the output of analog data in response to the disable signal.

Authorization control circuit and method

A normalization for streaming digital audio signals applies a gain factor according to the maximum sample magnitude in a window of samples and compare the gain factor to prior gain factors to adjust the gain factor for the samples in the window of samples. Adaptation of the gain factor with rapid decreases but slow increases avoids saturation but allows quiet passages.

Streaming normalization

A media player coupled to a network contains a processor, non-volatile memory, volatile memory, a driver, and input and output ports. The media player receives a media file over the network that contains an encoded media stream and a universal decoder. The player's processor converts or translates (or otherwise generates) the universal decoder into a player-specific decoder which may differ from the universal decoder. A library of routines stored in the non-volatile memory is used to create the player-specific decoder. The media stream downloaded to the media player may comprise audio, video, or any other desired type of media. In this manner, each media player can generate a decoder that differs, not only from the universal decoder, but may also differ from other media players thereby alleviating the burden on the media source from having to download the encoded media with a decoder specific to the target media player.

Universal decoder for use in a network media player

A secure bootloader for securing software and systems in a digital deviceby ensuring only encrypted and authenticated boot software is loaded and executed in the digital device. The encrypted boot software is read into the deviceand authenticated. If the boot software is not authenticated, then the digital devicedoes not boot.

Secure bootloader for securing digital devices

The programmable transition state machine of this invention is designed to allow implementation of hardware capable of increasing the performance of critical encoding and decoding tasks in a microprocessor environment where a required encoding or decoding or machines is not known in advance. The state machine described may also be used in systems that need flexibility to support a wide variety of functions or machines or where a hardwired approach is not useful. This unique state machine processes the state information and the transition from a present state to a next state in CPU-programmable logic.

Programmable transition state machine

The 64-bit single cycle fetch method described here relates to a specific 'megastar' core processor employed in a range of new digital signal processor devices. The 'megastar' core incorporates 32-bit memory blocks arranged into separate entities or banks. Because the parent CPU has only three 16-bit buses, a maximum read in one clock cycle through the memory interface would normally be 48-bits. This invention describes an approach for a fetch method involving tapping into the memory bank data at an earlier stage prior to the memory interface. This allows the normal 48-bit fetch to be extended to 64-bits as required for full performance of the numerical processor accelerator and other speed critical operations and functions.

Growing community of inventors

Houston, TX, United States of America

Jason Douglas Kridner