International Business Machines Corporation

Jason Chung

Paul Steven Zuchowski

Leon Jacob Sigal

Brian A Worth

William John Livingstone

Amol Anil Joshi

John E Barwin, Iii

Hongfei Wu

Songtao Xu

A method of characterizing an electromigration (EM) parameter for use in an integrated circuit (IC) chip design including, inputting a layout of a wire layer and identifying a signal gate-circuit including electrically parallel paths, connected to an output of the signal gate from the layout. Based on widths for each of the paths, determining a maximum possible current for each of the paths, and calculating an average current for each of the paths. Identifying a path that is most limited in its current carrying capacity by possible EM failure mechanisms, and storing in a design library, a possible maximum current output to the identified limiting path, as the EM parameter.

Identifying and mitigating electromigration failures in signal nets of an integrated circuit chip design

In order to reduce slew rate and minimize delay skew, the invention adds a pull-down booster circuit connected to the gate of the driving transistor and/or a pull-up booster circuit connected the gate of the driving transistor. The pull-down booster circuit is adapted to dynamically pull-down the voltage at the gate of the driving transistor when the voltage level at the input to the logical enable device changes from a first voltage (e.g., a logical &ldquo;0&rdquo;) to a second voltage (e.g., a logical &ldquo;1&rdquo;). The pull-up booster circuit is adapted to dynamically pull-up the voltage at the gate of the driving transistor when the voltage level at the input to the logical enable device changes from the second voltage to the first voltage.

Dynamic driver boost circuits

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Williston, VT, United States of America

Jason Chung