Qualcomm Incorporated

Jason Cheng

Chulmin Jung

Changho Jung

Venugopal Boynapalli

Arun Babu Pallerla

Yandong Gao

Sung Son

A bitcell architecture for a pseudo-triple-port memory is provided that includes a a bitcell arranged on a semiconductor substrate, the bitcell defining a bitcell width and a bitcell height and including a first access transistor and a second access transistor. A first metal layer adjacent the semiconductor substrate is patterned to form a pair of local bit lines arranged within the bitcell width. The pair of local bit lines includes a local bit line coupled to a terminal of the first access transistor and includes a complement local bit line coupled to a terminal of the second access transistor.

Growing community of inventors

San Diego, CA, United States of America

Jason Cheng