Broadcom Corporation

Other

Jared Welz

John S Walley

Charles Abraham

Evan S McCarthy

Todd Lee Brooks

Josephus A Van Engelen

Vinay Chandrasekhar

Amir Ibrahim

Sunil Kanekal

Charles P Norman

Kambiz Shoarinejad

Andreas Warloe

Jeon Hyun-Gyu

Brima Babatunde Ibrahim

Henrik Tholstrup Jensen

Stephen Wu

Jason Matthew Goldberg

Hyun-Gyu Jeon

Disclosed are various embodiments involving correction of signals generated by a crystal oscillator. An age of an integrated circuit or a time of use of the integrated circuit may be determined. A signal generated from a crystal of the integrated circuit may be modified based at least in part on the determined age of the integrated circuit or the determined time of use of the integrated circuit.

Method and system for signal generation via a temperature sensing crystal integrated circuit

A direct-sequence spread spectrum (DSSS) receiver may be operable to process signal samples in frequency domain utilizing a prime factor fast Fourier transform (FFT) circuit and a pseudorandom noise (PRN) code. The DSSS receiver may be operable to transform the signal samples into FFT signal samples using the prime factor FFT circuit, transform the PRN code into a FFT PRN code using the prime factor FFT circuit and multiply the FFT signal samples with the FFT PRN code using the prime factor FFT circuit. The DSSS receiver may be operable to inversely transform the multiplied FFT signal samples into correlated signal samples using a prime factor inverse FFT (IFFT) implemented by the prime factor FFT circuit. The prime factor FFT circuit may comprise a prime length FFT core, a FFT memory, a register bank, a switch, a multiplier and a FFT controller.

Method and system for efficient DSSS FFT processing employing prime factor decomposition

A global navigation satellite system (GNSS) receiver may be operable to quantize two-dimensional GNSS sample data with an in-phase (I) and quadrature (Q) pair to two-dimensional quantized data with a magnitude and angle pair using the polar quantization, for example, an unrestricted polar quantization. The GNSS receiver may be operable to reduce a size of the two-dimensional quantized data for storage by representing the two-dimensional quantized data by the one-dimensional symbol data. The one-dimensional symbol data may be stored in a random access memory (RAM) for further processing. The I and Q pair associated with the one-dimensional symbol data stored in the RAM may be retrieved and processed by the GNSS receiver using a correlation such as a fast Fourier transform (FFT) correlation.

Method and system for polar quantization for GNSS data

Aspects of the invention may comprise an integrated circuit comprising a memory, a temperature sensor, a crystal, and a communication module. Data stored in the memory may indicate a frequency of the crystal as a function of temperature and/or time. The memory may be writable via the communication module. Data stored in the memory of the integrated circuit may be updated based on an age and/or time of use of the integrated circuit. The time of use may be one or both of: how long the crystal has been oscillating since its most-recent start up, and how long the crystal has been in use over its lifetime. An electronic device may calculate a frequency of an oscillating signal output by the crystal based on a temperature indication from the temperature sensor and data read from the memory of the integrated circuit.

Aspects of a method and system for compensating temperature readings from a temperature sensing crystal integrated circuit are provided. An electronic device may digitize a temperature indication received from a temperature sensing circuit, digitize one or more calibration voltages received from said temperature sensing circuit, and calculate a compensated temperature indication utilizing the digitized calibration voltage(s), and the digitized temperature indication, and data from a table that characterizes behavior of the temperature sensing circuit as a function of temperature. One or more circuits in the electronic device may be controlled based on the compensated temperature indication. The compensated temperature indication may compensate for a gain error and/or offset error of a digital to analog converter that digitizes the temperature indication and the calibration voltage(s). There may be two calibration voltages.

Method and system for compensating temperature readings from a temperature sensing crystal integrated circuit

A global navigation satellite system (GNSS) enabled mobile device may be operable to assert one of autoblank signals when RF interference is detected in received GNSS signals for one of consecutive first time windows. The asserted autoblank signals are monitored by the GNSS enabled mobile device over time intervals corresponding to consecutive second time windows and a rate at which the autoblank signals are asserted for each of the consecutive second time windows is determined by the GNSS enabled mobile device based on the monitoring. The GNSS enabled mobile device may be operable to determine whether to blank processing of the received GNSS signals based on the determined rate. The autoblank signals may be asserted by the GNSS enabled mobile device based on a number of the received GNSS signals whose absolute signal levels exceed a signal level threshold for the first time window.

Method and system for RF interference mitigation using a blanking watchguard

Aspects of a method and system for a temperature sensing crystal Integrated circuit with digital temperature output are provided. In this regard, an indication of temperature may be generated in an integrated circuit (IC) comprising a memory, a crystal or crystal oscillator, and at least a portion of an analog-to-digital converter. The temperature indication may be digitized via the analog-to-digital converter. Operation of one or more circuits may be controlled based on the digital temperature indication. The digital temperature indication may be communicated over a communication bus. An analog portion of the analog-to-digital converter may be integrated in the IC and may comprise, for example, a delta-sigma modulator. A digital portion of the analog-to-digital converter may be external to the IC and may comprise, for example, a digital filter.

Method and system for a temperature sensing crystal integrated circuit with digital temperature output

Aspects of a method and system for signal generation via a temperature sensing crystal integrated circuit are provided. In this regard, a temperature sensing crystal integrated circuit (TSCIC) comprising a memory and a crystal or crystal oscillator may generate a signal indicative of a measured temperature. The generated signal and data stored in the memory may be utilized to configure one or more circuits communicatively coupled to the TSCIC. The data stored in the memory may characterize behavior of the TSCIC as a function of temperature and/or time. The data characterizing the behavior of the TSCIC may indicate variations in frequency of the crystal or crystal oscillator as a function of temperature and/or time. The data characterizing the behavior of the TSCIC may comprise one or both of a frequency value and a frequency correction value.

A global navigation satellite system (GNSS) enabled mobile device may be operable to monitor and determine counts at which autoblank signals are asserted over time intervals corresponding to consecutive time windows during the RF interference mitigation process using autoblanking. The GNSS enabled mobile device may be operable to disable the generation of a blank signal when the count may be greater than a particular count threshold at the end of the time window. The GNSS enabled mobile device may be operable to enable the generation of a blank signal when the count may be less than or equal to a particular count threshold at the end of the time window. The blank signals may be used to blank the processing of the received GNSS signals.

Aspects of a method and system for compensating temperature readings from a temperature sensing crystal integrated circuit are provided. In this regard, a temperature indication and calibration voltages from a temperature sensing crystal integrated circuit (TSCIC) may be digitized and the digital signals may be utilized to calculate a compensated temperature indication. Data derived from a memory integrated within the TSCIC may be retrieved based on the compensated temperature indication. The retrieved data may be utilized to control operation of one or more circuits. The compensated temperature indication may be calculated by removing a gain error and/or offset error from the digitized temperature indication. The compensated temperature indication may be utilized as an index for a data table. The compensated temperature indication may be a normalized compensated temperature indication. The calibration voltages may include a minimum voltage and/or a maximum voltage that the TSCIC is operable to output.

Various embodiments are disclosed relating to a wireless transceiver. In an example embodiment, a method of compensating for phase imbalance and amplitude imbalance between corresponding in-phase signals and quadrature-phase signals includes providing a plurality of test tones of various frequencies to a receiver and determining, for each of the test tones, a respective phase imbalance and a respective amplitude imbalance between an in-phase (I) signal and a quadrature-phase (Q) signal of the test tone. The example method also includes determining a set of filter coefficients based on the determined phase and amplitude imbalances of the plurality of test tones and applying the set of filter coefficients to a plurality of filters. In the example method, a phase imbalance between an I signal and a Q signal of a received wireless signal is compensated for using a first filter of the plurality of filters. Further, an amplitude imbalance between the I and Q signals of the received wireless signal is compensated for using a second filter of the plurality of filters.

Method and apparatus for I/Q imbalance compensation

Aspects of a method and system for using a frequency locked loop LOGEN in oscillator systems may include generating an oscillating signal via one or more circuits comprising a feedback loop. The generation may be controlled by enabling or disabling the feedback loop, based on the generated oscillating signal. The one or more circuits may comprise a frequency-locked loop (FLL) that may enable the generation of the oscillating signal. The frequency-locked loop may comprise a voltage-controlled oscillator. The feedback loop may be disabled when an estimated frequency difference between a reference signal and a feedback signal may be less than or equal to a specified threshold. The feedback loop may be enabled when an estimated frequency difference between a reference signal and a feedback signal may be greater than a particular threshold.

Growing community of inventors

Seal Beach, CA, United States of America

Jared Welz