International Business Machines Corporation

Jared Barney Hertzberg

Sami Rosenblatt

Markus Brink

Rasit Onur Topaloglu

Easwar Magesan

Martin O Sandberg

Vivekananda P Adiga

Dongbing Shao

Hanhee Paik

John Aaron Smolin

Jay Michael Gambetta

Jason Scott Orcutt

Werner A Rausch

Firat Solgun

Baleegh Abdo

Salvatore Bernardo Olivadese

Eric Peter Lewandowski

David C Mckay

Andrew W Cross

Theodore James Yoder

Guanyu Zhu

Christopher Chamberland

Devendra K Sadana

Stephen W Bedell

Steven J Holmes

Ning Li

Arvind Kumar

Jae-Woong Nah

Bucknell Chapman Webb

Alan Edward Rosenbluth

Joshua M Rubin

Nicholas Torleiv Bronn

Antonio Corcoles-Gonzalez

Maika Takita

Oblesh Jinka

Moein Malekakhlagh

Adiga Vivekananda

The invention includes methods, and the structures formed, for multi-qubit chips. The methods may include annealing a Josephson junction of a qubit to either increase or decrease the frequency of the qubit. The conditions of the anneal may be based on historical conditions, and may be chosen to tune each qubit to a desired frequency.

Frequency tuning of multi-qubit systems

Techniques facilitating frequency allocation in multi-qubit circuits are provided. In one example, a computer-implemented method comprises determining, by a device operatively coupled to a processor, an estimated fabrication yield associated with respective qubit chip configurations by conducting simulations of the respective qubit chip configurations at respective frequency offsets; and selecting, by the device, a qubit chip configuration from among the respective qubit chip configurations based on the estimated fabrication yield associated with the respective qubit chip configurations.

Frequency allocation in multi-qubit circuits

A quantum computer includes a quantum processor that includes a first plurality of qubits arranged in a hexagonal lattice pattern such that each is substantially located at a hexagon apex, and a second plurality of qubits each arranged substantially along a hexagon edge. Each of the first plurality of qubits is coupled to three nearest-neighbor qubits of the second plurality of qubits, and each of the second plurality of qubits is coupled to two nearest-neighbor qubits of the first plurality of qubits. Each of the second plurality of qubits is a control qubit at a control frequency. Each of the first plurality of qubits is a target qubit at one of a first target frequency or a second target frequency. The quantum computer includes an error correction device configured to operate on the hexagonal lattice pattern of the plurality of qubits so as to detect and correct data errors.

Quantum code for reduced frequency collisions in qubit lattices

A method of frequency allocation in a quantum device having a plurality of qubits includes determining a plurality of frequency groups based on a configuration of the plurality of qubits; determining, for each of the plurality of qubits, a qubit frequency; assigning a frequency group from the plurality of frequency groups to each of the plurality of qubits based on each respective qubit frequency; determining for at least one qubit of the plurality of qubits whether a frequency collision exists between the at least one qubit and neighboring qubits in the plurality of qubits based on the qubit frequency of the at least one qubit and at least one qubit frequency of the neighboring qubits; and adjusting the frequency of the at least one qubit based on the determination whether a frequency collision exists between the at least one qubit and said neighboring qubits in the plurality of qubits. A non-transitory computer-readable medium for frequency allocation in a quantum device includes instructions to perform the method.

Color-map method to eliminate qubit frequency crowding in a quantum computing chip

A technique relates to a superconducting chip. Resonant units have resonant frequencies, and the resonant units are configured as superconducting resonators. Josephson junctions are in the resonant units, and one or more of the Josephson junctions have a shorted tunnel barrier.

Qubit network non-volatile identification

Techniques regarding tiling a CR gate configuration to one or more lattices characterizing quantum circuit topologies are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a tiling component that can generate a cross-resonance gate configuration that delineates a control qubit assignment and a target qubit assignment in conjunction with a frequency allocation onto a lattice characterizing a quantum circuit topology.

Tiling of cross-resonance gates for quantum circuits

Systems, devices, computer-implemented methods, and computer program products to facilitate contactless screening of a qubit are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a scanner component that establishes a direct microwave coupling of a scanning probe device to a qubit of a quantum device. The computer executable components can further comprise a parameter extraction component that determines qubit frequency of the qubit based on the direct microwave coupling.

Contactless screening of a qubit

Techniques related to vertical silicon-on-metal superconducting quantum interference devices and method of fabricating the same are provided. Also provided are associated flux control and biasing circuitry. A superconductor structure can comprise a silicon-on-metal substrate that can comprise a first superconducting layer, comprising a first superconducting material, between a first crystalline silicon layer and a second crystalline silicon layer. The superconducting structure can also comprise a first via comprising a first Josephson junction and a second via comprising a second Josephson junction. The first via and the second via can be formed between the first superconducting layer and a second superconducting layer, comprising a second superconducting material. An electrical loop around a defined area of the second crystalline silicon layer can comprise the first via comprising the first Josephson junction, the second via comprising the second Josephson junction, the first superconducting layer, and the second superconducting layer.

Vertical silicon-on-metal superconducting quantum interference device

Systems and techniques that facilitate quantum tuning via permanent magnetic flux elements are provided. In various embodiments, a system can comprise a qubit device. In various aspects, the system can further comprise a permanent magnet having a first magnetic flux, wherein an operational frequency of the qubit device is based on the first magnetic flux. In various instances, the system can further comprise an electromagnet having a second magnetic flux that tunes the first magnetic flux. In various cases, the permanent magnet can comprise a nanoparticle magnet. In various embodiments, the nanoparticle magnet can comprise manganese nanoparticles embedded in a silicon matrix. In various aspects, the system can further comprise an electrode that applies an electric current to the nanoparticle magnet in a presence of the second magnetic flux, thereby changing a strength of the first magnetic flux.

Quantum tuning via permanent magnetic flux elements

Systems, computer-implemented methods, and computer program products that can facilitate quantum circuit topology selection based on frequency collisions between qubits, are described. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a simulation component that simulates operation of qubits in a subgraph topology of a graph representing a topology of a quantum circuit to determine a quantity of frequency collisions between the qubits. The computer executable components can further comprise a selection component that selects a quantum circuit topology based on the quantity of frequency collisions between the qubits.

Quantum circuit topology selection based on frequency collisions between qubits

A quantum computing device includes a first chip having a first substrate and one or more qubits disposed on the first substrate. Each of the one or more qubits has an associated resonance frequency. The quantum computing device further includes a second chip having a second substrate and at least one conductive surface disposed on the second substrate opposite the one or more qubits. The at least one conductive surface has at least one dimension configured to adjust the resonance frequency associated with at least one of the one or more qubits to a determined frequency adjustment value.

Qubit frequency tuning structures and fabrication methods for flip chip quantum computing devices

In an embodiment, a method includes forming a first chip having a first substrate and one or more qubits disposed on the first substrate, each of the one or more qubits having an associated resonance frequency. In an embodiment, the method includes forming a second chip having a second substrate and at least one conductive surface disposed on the second substrate opposite the one or more qubits, the at least one conductive surface having at least one dimension configured to adjust the resonance frequency associated with at least one of the one or more qubits to a determined frequency adjustment value.

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Yorktown Heights, NY, United States of America

Jared Barney Hertzberg