Samsung Electronics Co., Ltd.

Korea University Research and Business Foundation

Jangeun Lee

Sechung Oh

Woojin Kim

Junho Jeong

Woo Chang Lim

Sukhun Choi

Jeahyoung Lee

Xueti Tang

Kyungtae Nam

Heeju Shin

Ung Hwan Pi

Sung Chul Lee

Dae Kyom Kim

KyungTae Nam

Kyunghyun Kim

Dustin William Erickson

Kwang Seok Kim

Eugene Youjun Chen

Younghyun Kim

Taejin Park

Huijung Kim

Minsik Kim

Kyung Jin Lee

Minjoo Lee

Woochang Lim

Hong Ju Suh

Eunyoung Lee

A gate structure may include a first gate electrode extending in a first direction, a second gate electrode on a portion of the first gate electrode, a gate mask on the first and second gate electrodes, and a gate insulation pattern on a lower surface and a sidewall of the first gate electrode and sidewalls of the second gate electrode and the gate mask. The gate structure is in an upper portion of a substrate. A grain size of the second gate electrode is greater than a grain size of the first gate electrode.

Gate structures and semiconductor devices including the same

An integrated circuit device according may include a plurality of gate structures embedded in a substrate, a direct contact on the substrate between the plurality of gate structures, and a bit line electrode layer on the direct contact. The bit line electrode layer has a thickness of about 10 nm to 30 nm. The bit line electrode layer may include a molybdenum tungsten (MoW) alloy including molybdenum (Mo) a range of about 25 at % to about 75 at %.

Integrated circuit device

A magnetic memory device may include a perpendicular magnetic structure, an in-plane magnetic structure, a free magnetic pattern between the perpendicular magnetic structure and the in-plane magnetic structure, and a tunnel barrier pattern between the perpendicular magnetic structure and the free magnetic pattern. The perpendicular magnetic structure may include at least one pinned pattern which has a perpendicular magnetization direction that is pinned to a specific direction, and the free magnetic pattern may have a switchable perpendicular magnetization direction. The in-plane magnetic structure may include a first magnetic pattern and a second magnetic pattern, and each of the first and second magnetic patterns may have a different respective in-plane magnetization direction.

Magnetic memory devices including magnetic tunnel junctions

A magnetic memory device includes a first cell array structure including first and second free magnetic patterns which extend in a first direction parallel to a top surface of a substrate and are spaced apart from each other in a second direction intersecting the first direction, and a second cell array structure including a third free magnetic pattern between the first and second free magnetic patterns and a fourth free magnetic pattern spaced apart from the third free magnetic pattern with the second free magnetic pattern therebetween. The first cell array structure further includes a first transistor region including first transistors connected to the first and second free magnetic patterns. The second cell array structure further includes a second transistor region including second transistors connected to the third and fourth free magnetic patterns. The second transistor region is spaced apart from the first transistor region in the first direction.

Magnetic memory device

A method for providing a magnetic junction usable in a magnetic device and a magnetic junction are described. A reference layer, a crystalline MgO tunneling barrier layer and a free layer are provided. The crystalline MgO tunneling barrier layer is continuous, has a (001) orientation and has a thickness of not more than eleven Angstroms and not less than two Angstroms. The crystalline MgO tunneling barrier layer is between the free layer and the reference layer. The magnetic junction is configured such that the free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction.

Method for providing a magnetic junction on a substrate and usable in a magnetic device

A magnetic junction usable in a magnetic device is described. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, an asymmetric free layer and a perpendicular magnetic anisotropy (PMA) inducing layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The free layer is between the nonmagnetic spacer layer and the PMA inducing layer. The asymmetric free layer includes a first ferromagnetic layer having a first boron content and a second ferromagnetic layer having a second boron content. The second boron content is less than the first boron content. The first boron content and the second boron content are each greater than zero atomic percent. The first and second ferromagnetic layers each contain at least one of Co and CoFe. The magnetic junction is configured such that the asymmetric free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction.

Magnetic junctions using asymmetric free layers and suitable for use in spin transfer torque memories

A method for providing a magnetic junction usable in a magnetic device and the magnetic junction are described. The method includes providing a free layer, a pinned layer and a nonmagnetic spacer layer between the free layer and the pinned layer. The free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction. At least one of the step of providing the free layer includes a first plurality of steps and the step of providing the pinned layer includes a second plurality of steps. The first and second plurality of steps include depositing a portion of a layer, depositing a sacrificial layer, annealing the portion of the magnetic junction under the sacrificial layer, and depositing a remaining portion of the layer. The layer may be the free layer, the pinned layer, or both.

Method for providing a perpendicular magnetic anisotropy magnetic junction usable in spin transfer torque magnetic devices using a sacrificial insertion layer

A magnetic junction usable in a magnetic device and a method for providing the magnetic junction are described. The magnetic junction includes a free layer, a pinned layer and nonmagnetic spacer layer between the free and pinned layers. The free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction. The free and pinned layers each has a layer perpendicular magnetic anisotropy energy greater than an out-of-plane demagnetization energy. At least one of the pinned layer and the free layer includes a multilayer. The multilayer includes at least one bilayer. Each of the bilayer(s) has a first layer and a second layer. The first layer includes an alloy of a magnetic transition metal and a rare earth. The second layer includes an amorphous magnetic layer. The multilayer has a nonzero perpendicular magnetic anisotropy up to at least four hundred degrees Celsius.

Method and system for providing rare earth magnetic junctions usable in spin transfer torque magnetic random access memory applications

A magnetic memory device is provided. The magnetic memory device includes a first vertical magnetic layer and a second vertical magnetic layer on a substrate, a tunnel barrier layer between the first vertical magnetic layer and the second vertical magnetic layer, and an exchange-coupling layer between a first sub-layer of the first vertical magnetic layer and a second sub-layer of the first vertical magnetic layer.

Provided are magnetic memory devices, electronic systems and memory cards including the same, methods of manufacturing the same, and methods of controlling a magnetization direction of a magnetic pattern. In a magnetic memory device, atomic-magnetic moments non-parallel to one surface of a free pattern increase in the free pattern. Therefore, critical current density of the magnetic memory device may be reduced, such that power consumption of the magnetic memory device is reduced or minimized and/or the magnetic memory device is improved or optimized for a higher degree of integration.

Magnetic memory devices having a uniform perpendicular nonmagnetic rich antisotropy enhanced pattern

A magnetic junction usable in a magnetic device is described. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, an asymmetric free layer and a perpendicular magnetic anisotropy (PMA) inducing layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The free layer is between the nonmagnetic spacer layer and the PMA inducing layer. The asymmetric free layer includes a first ferromagnetic layer having a first boron content and a second ferromagnetic layer having a second boron content. The second boron content is less than the first boron content. The first boron content and the second boron content are each greater than zero atomic percent. The magnetic junction is configured such that the asymmetric free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction.

A magnetic memory device may include a first vertical magnetic layer, a non-magnetic layer on the first vertical magnetic layer, and a first junction magnetic layer on the non-magnetic layer, with the non-magnetic layer being between the first vertical magnetic layer and the first junction magnetic layer. A tunnel barrier may be on the first junction magnetic layer, with the first junction magnetic layer being between the non-magnetic layer and the tunnel barrier. A second junction magnetic layer may be on the tunnel barrier with the tunnel barrier being between the first and second junction magnetic layers, and a second vertical magnetic layer may be on the second junction magnetic layer with the second junction magnetic layer being between the tunnel barrier and the second vertical magnetic layer.

Growing community of inventors

Suwon-si, South Korea

Jangeun Lee