Spts Technologies Limited

Surface Technology Systems Plc

Janet Hopkins

Jyoti Kiron Bhardwaj

Huma Ashraf

Alan Michael Hynes

Oliver James Ansell

Martin Edward Ryan

Martin Hanicinec

Babak Khamsehpour

David Mark Haynes

Leslie Michael Lea

Ian Ronald Johnston

Jash Patel

Simon Dawson

A metallic feature on a substrate is subjected to a plasma dicing process and is cleaned. The workpiece has a carrier sheet attached to a frame member. The carrier sheet carries the substrate. The workpiece is provided on a workpiece support disposed within a chamber of an inductively coupled plasma apparatus. A sputter etch step is performed, including introducing a sputter gas or gas mixture into the chamber and sustaining an inductively coupled plasma of the sputter gas or gas mixture so as to sputter etch the substrate. A chemical etch step also is performed, including introducing Ogas and/or Ogas) into the chamber and sustaining an inductively coupled plasma of the Oand/or Ogas) so as to chemically etch the substrate. The sputter etch step and chemical etch step can be repeated.

Method and apparatus

A semiconductor wafer dicing process is disclosed for dicing a wafer into individual dies, each die comprising one integrated circuit. The process comprises: disposing a coating upon the wafer; removing at least a portion of the coating to expose regions of the wafer, along which the wafer is to be diced, to form a workpiece; disposing the workpiece upon a platen within a processing chamber; plasma treating the workpiece with a set of plasma treatment conditions to etch a portion of the exposed regions of the wafer to form a wafer groove which extends laterally beneath the coating to form an undercut; and plasma etching the workpiece with a set of plasma etch conditions, which are different to the plasma treatment conditions, to etch through the wafer and dice the wafer along the wafer groove.

Semiconductor wafer dicing process

A method is for plasma etching one or more dicing lanes in a silicon substrate having a backside metal layer attached thereto. The method includes performing a main etch using a cyclical plasma etch process in which a deposition step and an etch step are alternately repeated to produce dicing lanes having scalloped sidewalls, and switching to performing a secondary etch using a cyclical plasma etch process in which a deposition step and an etch step are alternately repeated until the backside metal layer is reached. The amount of silicon removed in one etch step during the secondary etch is half or less than half of the amount of silicon removed in one etch step during the main etch.

Methods of plasma etching and plasma dicing

A method is for etching a semiconductor substrate to reveal one or more features buried in the substrate. The method includes performing a first etch step using a plasma in which a bias power is applied to the substrate to produce an electrical bias, performing a second etch step without a bias power or with a bias power which is lower than the bias power applied during the first etch step, and alternately repeating the first and second etch steps.

Method of etching

A sidewall passivation layer is deposited on an etched feature in a semiconductor substrate with a hydrocarbon deposition gas by introducing H,, determining certain mixture percentages for the hydrocarbon gas/H,mix at which the etch rate for the substrate peaks, the etch rate begins to rise from a generally steady state, and/or the etch rate falls to zero, and then maintaining the mixture percentage within a selected range. Where the hydrocarbon gas/H,mix is maintained at a percentage between the steady-state etch rate percentage and the peak etch rate percentage, then relatively high ion energies are used. Where the hydrocarbon gas/H,mix is maintained at a percentage between the peak etch rate percentage and the percentage where the etch rate falls to zero, then relatively low ion energies are used. High aspect-ratio features in a semiconductor substrate can be produced by performing alternating etching and depositing a passivation layer on the substrate, where the deposition is performed according to the above-described deposition process.

Method of surface treatment of semiconductor substrates

There is disclosed a method and apparatus for etching a substrate. The method comprises the steps of etching a substrate or alternately etching and depositing a passivation layer. A bias frequency, which may be pulsed, may be applied to the substrate and may be at or below the ion plasma frequency.

Method and apparatus for etching a substrate

This invention relates to methods for treatment of semiconductor substrates and in particular a method of etching a trench in a semiconductor substrate in a reactor chamber using alternatively reactive ion etching and depositing a passivation layer by chemical vapour deposition, wherein one or more of the following parameters: gas flow rates, chamber pressure, plasma power, substrate bias, etch rate, deposition rate, cycle time and etching/deposition ratio vary with time.

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Powys, United Kingdom

Janet Hopkins