Bbc Brown Boveri Ag

Bbc Brown, Boveri & Company, Limited

Asea Brown Boveri Ag

Jan Voboril

Jens Gobrecht

Peter Roggwiller

Horst Gruning

Roland Sittig

Thomas Vlasak

Bruno Broich

Helmut Keser

Sven Klaka

C Christiaan Abbas

Christian C Abbas

The present invention discloses a power semiconductor component 1 having a special pressure contact system which is suitable, for example, for circuit-breakers, rectifiers, or the like in industrial drives. A pressure-equalizing element 9 in the form of a box 10, 15 with a flowable or plastically deformable medium 12 is inserted between a pressure plunger 7a and a power semiconductor 2. Because of the hydrostatic pressure in the box 10, an inhomogeneous pressure delivered at one side is passed on to the other side as a homogeneous pressure. A homogeneous pressure delivery can be achieved, even in the edge region of the pressure surfaces 11a, 11b, by means of an inlet camber of the lateral surface 13. The box 10, 15 preferably consists of copper or AlSiC, and the medium 12 of a liquid metal (Ga, Hg), a plastic metal (Pb, Al) or of metal balls (Cu) in silicone oil. The box can be arranged on one or both sides of one or more power semiconductors 2, and can also replace the molybdenum disks 3a, 3b or contact plates 4a, 4b.

Power semiconductor component with a pressure-equalizing contact plate

A gate-turn-off power semiconductor device of the GTO or FCTh type, having a control zone of alternately arranged finely subdivided cathode fingers and gate trenches, wherein the gate trenches are constructed as narrow deep slots, preferably by a crystal-direction-selective wet chemical etching process, while the original substrate surface is retained in the remaining area of the semiconductor substrate. Compared with the conventional 'recessed-gate' construction, this quasi-planar construction offers a number of advantages in the electrical behavior, in the integration of auxiliary functions and in the production.

Semiconductor gate-controlled high-power capability bipolar device

In a semiconductor component, a pn junction which emerges at a main surface (2) of a semiconductor substrate (1) at the edge of a highly doped zone (3) is formed by a laterally bounded, highly doped zone (3) extending inwards from a main surface (2) of the semiconductor substrate (1) and by a lightly doped zone surrounding the highly doped zone. The edge of the highly doped zone (3) is formed by a guard zone (6b) whose doping density gradually decreases in a direction parallel to the main surface (2) from the highly doped zone (3) towards the pn junction. Any surface breakdown of the pn junction is prevented by the fact that the guard zone (6b) has a maximum penetration depth near the highly doped zone (3) and that the maximum penetration depth of the guard zone (6b) is greater than the penetration depth of the adjacent highly doped zone (3). The guard zone (6b) has a maximum doping density which does not appreciably exceed 10.sup.15 cm.sup.-3, a width which is comparable with a thickness of the slightly doped zone and a maximum penetration depth which is between 40 .mu.m and 80 .mu.m. The doping density of the guard zone (6b) decreases approximately linearly or stepwise in a direction parallel to the main surface (2).

PN-junction with guard ring

In a high-reverse-voltage GTO thyristor, a negative beveling (6) with comparatively high beveling angle (.alpha.) is possible as edge contouring as a result of separating the p-type base layer into a central p-type base layer (4) of small depth and high edge concentration and a p-type base edge layer (5) of greater depth and lower edge concentration. The production of the two p-type base layers (4, 5) is preferably carried out by simultaneous diffusion of two acceptors with different diffusion constants.

Method of making a gate turn-off thyristor using a simultaneous

Turn-off thyristor

A semiconductor component including a doped semiconductor substrate into which an oppositely doped upper doping region is introduced from an upper surface to form a P-N junction which emerges at the upper surface in an edge region of the substrate. To impove the reverse breakdown voltage capacity below the surface inner section of the P-N juction, an oppositely doped lower doping region is buried in the semiconductor substrate beneath where the P-N juction emerges at the upper surface. The oppositely doped, lower doping region reduces the charge carrier concentration in the critical area. The structure retains the planar surface and is easily producible.

Semiconductor component increasing the breakdown voltage

In a process for etching complicatedly structured recesses in a silicon substrate, in which acid mixtures containing HF and HNO.sub.3 are used, the problems occurring with a photoresist mask are avoided, on the one hand, by using an SiO.sub.2 mask layer and on the other hand, by fabricating the mask layer beforehand with a thickness profile corresponding to the depth profile to be etched, thereby completely separating the masking and etching steps from each other.

Process for etching recesses in a silicon substrate

In a semiconductor component, which has various differently doped layers (2, 3, 4, 5) within a semiconductor substrate, an improvement of the electrical properties is achieved, wherein the thickness of the substrate in the current-carrying region is locally reduced by a deep etch well (10), the original mechanical stability of the semiconductor substrate largely remaining retained.

Semiconductor component

A field-controlled thyristor having a sequence of layers consisting of anode layer, channel layer and gate regions and cathode regions, which regions are alternately arranged at the cathode side, wherein an improvement in the turn-off gain is achieved by a p-type doping of the side walls of the troughs which separate the cathode regions from each other, and/or by an additional intermediate layer which has low p-type doping and which is arranged between adjacent gate regions.

Disconnectable power semiconductor component

A process for manufacturing a power semiconductor component having a component of this type is presented which has at least three consecutive layers and possessing a high current capacity and small power losses. For contacting the first two layers, the component has first second metallized contact planes, which impress a step-like structure onto a first surface of the component. The steps have a height of between 10 and 20 .mu.m and a width of between 20 and 300 .mu.m. The ratio between the surface area of the first contact plane and the surface area of the second contact plane is between 1 and 4. The first layer is heavily doped and has a maximum thickness of 8 .mu.m, and the second layer is lightly doped and has a maximum thickness of 40 .mu.m. According to the process for manufacturing the component, the surface structure according to the invention is produced essentially by a reactive ion-etching process with a single aluminum mask.

Process for manufacturing a power semiconductor component

A coating layer (2) for semiconductor technology having an edge contour which has a wedge-shaped cross section is produced by predominantly anisotropic dry etching of the coating layer (2) through a mask (4) disposed in front of the coating layer (2) at a finite mask distance (A). The coating layer (2) etched in this manner is especially well suited as an insulating substrate for a field plate in the edge region of a P-N junction emerging at the surface and also as implantation mask for producing a P-N junction with lateral doping gradients.

Method for producing a coating layer for semiconductor technology and

For the p-type doping of silicon, particularly for power semiconductor components, aluminum from an Al target is precipitated by cathode sputtering in an argon plasma on a major face (2) of a silicon wafer (1) by which means a comparatively high purity of the deposited aluminum is achieved. Before the aluminum deposition, the silicon water (1) is bombarded with argon ions for 10 min at an argon pressure of 20 .mu.bar which guarantees a uniform fusion of the aluminum with the silicon during later heating and, in particular, prevents the formation of droplets of the aluminum on the major face (2). The Al layer formed in this manner is photo-lithographically preferably structured in such a manner that several aluminum sources spaced apart from each other are allocated to one aluminum-doped zone (10). The subsequent diffusion occurs for 300 min at 1250.degree. C. in a gas mixture of nitrogen or argon (1 l/min) and oxygen (20 ml/min). During this process, the aluminum-doped zone (10) is produced. Subsequently, photoresist (13,14) is applied to the non-diffused regions. Residues (11') of the aluminum sources are then laterally etched by a silicon etchant and, as a result, removed. Following this, the photoresist (13,14) is removed.

Method for diffusing aluminum

A power semiconductor component having a component of this type is presented which has at least three consecutive layers and possessing a high current capacity and small power losses. For contacting the first two layers, the component has first and second metallized contact planes, which impress a step-like structure onto a first surface of the component. The steps have a height of between 10 and 20 .mu.m and a width of between 20 and 300 .mu.m. The ratio between the surface area of the first contact plane and the surface area of the second contact plane is between 1 and 4. The first layer is heavily doped and has a maximum thickness of 8 .mu.m, and the second layer is lightly doped and has a maximum thickness of 40 .mu.m. The invention further includes a process for manufacturing the component, wherein the surface structure according to the invention is produced essentially by a reactive ion-etching process with a single aluminum mask.

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Nussbaumen, Switzerland

Jan Voboril