Industrial Technology Research Institute

Chunghwa Picture Tubes, Ltd.

Jan-Ruei Lin

Shyh-Shyuan Sheu

Shang-Li Chen

Wei-Jen Chang

Bowen Wang

Chun-Yao Huang

Jun-Ren Shih

Chang-Cheng Lin

Chia-Pao Chang

Chun-Yuan Hsu

Che-Cheng Kuo

Hsiang-Yun Wei

Ming-Daw Chen

Chih-Sheng Lin

Chang-Ho Liou

Yu-Lin Lee

Bo-Wen Wang

Jun-Ren Shin

The present invention discloses an OLED driving device, including a first switch transistor, a first transistor, a second switch transistor, a storage capacitor and a second transistor. The first switch transistor is used to receive a data signal, and output the data signal by the control of a first scan signal. The first transistor is used to compensate the effect of the threshold voltage of the second transistor. The second switch transistor is used to receive a voltage signal, and output the voltage signal by the control of a second scan signal. The storage capacitor is used to store a data voltage. The second transistor is electrically connected to the second switch transistor through the storage capacitor. The present invention can efficiently release the charges from the storage capacitor, enhance display effect, and change the input voltage level for adapting different operating voltages of integrate circuits.

Organic light emitting diode driving device

An organic memory at least includes a number of select lines, a number of data lines, a bit cell array, and a number of digital sensing circuits. The bit cell array includes a number of bit cells, wherein each bit cell includes an organic memory cell and a switch element. Each digital sensing circuit includes a current-to-voltage converter and a sensing block circuit. Therefore, a complete digital sensing mechanism of an organic memory IC is formed and is practicable and suitable for mass-production.

Sensing circuit for organic memory

A shift register, a driving circuit and a display device using the same are disclosed. The shift register includes a 1and a 2rectifying elements and 1&#x2dc;4transistors. 1source/drains of the 1&#x2dc;3transistors receive a common voltage respectively. The gates of the 1and 3transistors and a 2source/drain of the 2transistor are coupled to a 2terminal of the 2rectifying element. The gates of the 2and 4transistors and a 2source/drain of the 1transistor are coupled to a 2terminal of the 1rectifying element. A 1source/drain of the 4transistor is coupled to a 2source/drain of the 3transistor. The 1terminals of the 1and 2rectifying elements respectively receive input signals and a 1clock signal. A 2source/drain of the 4transistor receives a 2clock signal.

Shift register and driving circuit and display device using the same

A memory device is provided. The device comprises a sense amplifier having a cell input terminal and a reference input terminal, a first sub-array coupled to the cell input terminal through a first switch and coupled to the reference input terminal through a second switch, a second sub-array coupled to the cell input terminal through a third switch and coupled to the reference input terminal through a fourth switch, and a reference cell array coupled between the second switch and the fourth switch and coupled to the reference input terminal.

Load-balanced apparatus of memory

A shift-register circuit. The shift-register circuit has a plurality of shift-register units connected in series. Each of the shift-register units generates first and second pulse signals, wherein the first pulse signal is an output signal of the shift-register circuit and the second pulse signal is a trigger signal of a subsequent shift-register unit. A LCD panel driving circuit using the shift-register circuit is also disclosed.

Shift-register circuit

Scan driver and driving system with low input voltage and their level shift circuit are disclosed. The scan driver includes a latch unit, a level shift circuit and a buffer. The latch unit generates a first control signal and a second control signal. The level shift circuit is connected to the latch unit to receive the first control signal, the second control signal, a first clock signal and a second clock signal, so as to output a scan signal with high voltage level. The buffer enhances driving ability of the scan signal for driving thin-film transistors (TFTs) of a display panel.

Scan driver and scan driving system with low input voltage, and their level shift voltage circuit

A digital sensing circuit capable of sensing bit information stored in a bit cell of an organic memory is provided. The digital sensing circuit includes a current-to-voltage converter, a reset block circuit, and a sensing block circuit. The current-to-voltage converter converts a conduction current into a voltage signal. The sensing block circuit buffers and outputs the bit information according to the voltage signal. Therefore, the challenge of design and layout of the present invention is very low so that the yield rate will be improved. Hence, a practical memory device suitable for mass-production is achieved.

Digital sensing circuit

A bit cell of an organic memory is provided. The bit cell of the organic memory comprises an organic memory cell, a first transistor, a current mirror and a second transistor. To connect the organic memory cell to a data line, the first transistor is activated for reading and the second transistor is activated for writing. Furthermore, the first transistor has a greater size than the second transistor. Therefore, a fast processing time in writing and a large conduction current in reading are catered for. In addition, the current mirror amplifies the conduction current in reading and increases the capacity for resisting the interference by adjacent bit cell.

Bit cell of organic memory

The present invention relates a time-sharing multiplexing driving method and framework for image signals. By means of a plurality of wiring paths, the turned-on orders of the signal switches of the pixel units in a liquid crystal panel (LCD) are sequentially controlled so that the pixel units of two adjacent phases in the panel can have the same turned-on order. This not only can avoid the situation where the switch control signal serial connecting path in the panel is so long that the control signal of the end switch will be seriously distorted for the excessively great load, but also make the variation amounts of the adjacent pixel data voltages the same. Therefore, the objective of the invention can be achieved. Namely, no joint space is generated during the image signal time-sharing multiplexing driving.

Time-sharing multiplexing driving method and framework for image signal

A Pixel Circuit For Liquid Crystal Display Using Static Memory is disclosed, wherein a digital circuit is installed at a pixel of the liquid crystal display (LCD) for processing static image. The digital circuit works with an analog circuit for processing dynamic image. Several multiplexers and static memory are provided to enhance the digital and analog signal processing, for lowering the power consumption so as to accomplish power saving function of a Pixel Circuit For Liquid Crystal Display Using Static Memory.

Pixel circuit for liquid crystal display using static memory

A pixel circuit for liquid crystal display is disclosed, wherein a digital circuit is installed at a pixel of the liquid crystal display (LCD) for processing static image. The digital circuit works with an analogue circuit for processing dynamic image. Several multiplexers are provided to enhance the digital and analogue signal processing, for lowering the power consumption so as to accomplish power saving function of a pixel circuit for liquid crystal display.

Pixel circuit for liquid crystal display

A shift-register unit. The first transistor includes a first source/drain coupled to a first terminal, a second source/drain, and a first gate coupled to a reset signal to stop the shift-register unit outputting a pulse signal. The second transistor includes a third source/drain coupled to the second source/drain, a fourth source/drain coupled to a second terminal, and a second gate coupled to a setting signal to initial the shift-register unit. The third transistor includes a fifth source/drain coupled to an output terminal, a third gate coupled to the second source/drain and a sixth source/drain coupled to a clock signal to start outputting the pulse signal. The fourth transistor includes a seventh source/drain coupled to the first terminal, an eighth source/drain coupled to the output terminal and a fourth gate coupled to a refresh signal to set a voltage level of the shift-register unit in a standby mode.

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Hsinchu, Taiwan

Jan-Ruei Lin