Infineon Technologies Ag

Infineon Technologies Austria Ag

Jan Ropohl

Albert Birner

Helmut Brech

Matthias Zigldrum

Michaela Braun

Franz Hirler

Uli Hiller

Ralf Siemieniec

Martin Poelzl

Oliver Blank

Walter Rieger

Maximilian Roesch

Rudolf Zelsacher

Joachim Krumrey

Andrew Wood

Mathias Born

Oliver Haeberlen

Ralf Henninger

Oliver Haeberlein

In an embodiment, a Group III nitride device includes a multilayer Group III nitride structure and a first ohmic contact arranged on and forming an ohmic contact to the multilayer Group III nitride device structure. The first ohmic contact includes a base portion having a conductive surface, the conductive surface including a peripheral portion and a central portion, the peripheral portion and the central portion being substantially coplanar and being of differing composition, a conductive via positioned on the central portion of the conductive surface and a contact pad positioned on the conductive via.

Group III nitride device having an ohmic contact

Group III nitride device and method of fabricating an ohmic contact for a group III nitride-based device

In an embodiment, a semiconductor device includes a semiconductor substrate having a front surface, a LDMOS transistor in the front surface, and a metallization structure arranged on the front surface. The metallization structure includes at least one cavity arranged in at least one dielectric layer. Related methods of manufacture are also described.

Method of manufacturing a semiconductor device including an LDMOS transistor

In an embodiment, a method includes forming a first opening in a front surface of a semiconductor substrate including a LDMOS transistor structure, and covering the first opening with a first layer to form an enclosed cavity defined by material of the semiconductor substrate and the first layer. The material of the first layer lines sidewalls of the enclosed cavity.

LDMOS transistor structure and method of manufacture

In an embodiment, a semiconductor device includes a semiconductor substrate having a front surface, a LDMOS transistor in the front surface, and a metallization structure arranged on the front surface. The metallization structure includes at least one cavity arranged in at least one dielectric layer.

Semiconductor device including a LDMOS transistor and method

In an embodiment, a semiconductor device includes a semiconductor substrate including a front surface, an LDMOS transistor structure in the front surface, a conductive interconnection structure arranged on the front surface, and at least one cavity arranged in the front surface.

Semiconductor device including a LDMOS transistor, monolithic microwave integrated circuit and method

In one embodiment, a field effect transistor has a semiconductor body, a drift region of a first conductivity type and a gate electrode. At least one trench extends into the drift region. A field plate is arranged at least in a portion of the at least one trench. A dielectric material at least partially surrounds both the gate electrode and the field plate. The field plate includes a first semiconducting material.

Semiconductor device

Semiconductor device with trench field plate including first and second semiconductor materials

A method for fabricating gate electrodes () in a field plate trench transistor () having a cell array with a plurality of trenches () and a plurality of mesa regions () arranged between the trenches comprises the following steps: application of a gate electrode layer () to the cell array in such a way that the gate electrode layer () has depressions within or above the trenches (), application of a mask layer () to the cell array, etching-back of the mask layer () in such a way that mask layer residues () remain only within the depressions of the gate electrode layer (), and etching-back of the gate electrode layer () using the mask layer residues () as an etching mask in such a way that gate electrode layer residues () remain only within/above the trenches ().

Method for fabricating gate electrodes in a field plate trench transistor, and field plate trench transistor

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Wuppertal, Germany

Jan Ropohl