Qualcomm Incorporated

Jan Paul Van Der Wagt

Seyfollah Seyfollahi Bazarjani

Prajakt Kulkarni

Jeffrey Mark Hinrichs

Shahin Mehdizad Taleie

Guoqing Miao

Joseph Robert Fitzgerald

Justin Joseph Rosen Gagne

Gene Hyde McAllister

Joseph R Fitzgerald

Prajakt V Kulkarni

Gene H Mcallister

A system and method of improving the efficiency in the power consumption of an audio system. In essence, the technique is to adjust the power delivered from the power supply to the analog section, such as the power amplifier, in response to the volume level indicated by the volume control module and/or in response to the detected characteristic of the input audio signal. Thus, in this manner, the analog section is operated in a manner that is related to the level of the signal it is processing. Additionally, the system and method also relate to a technique of adjusting the dynamic ranges of the digital signal and the analog signal to improve the overall dynamic range of the system without needing to consume additional power.

System and method of reducing power consumption for audio playback

Techniques for designing a buffer capable of working with low supply voltages, and having active output impedance matching capability to optimize power delivery to a wide range of loads. In an exemplary embodiment, cascode transistors are provided in a buffer architecture employing common-source transistors having unequal width-to-length ratios (W/L) and a resistance having a corresponding fixed ratio to the load. At least one of the cascode transistors may be dynamically biased to minimize a difference between the drain voltages of the common-source transistors. In a further exemplary embodiment, the output impedance of the buffer may be actively tuned by selectively enabling a set of tuning transistors coupled in parallel with the load. Further techniques for providing a calibration mode and an operation mode are described.

Buffer with active output impedance matching

A programmable gain circuit suitable for a programmable gain amplifier is described. In one design, the programmable gain circuit includes multiple attenuation circuits coupled in series. Each attenuation circuit operates in a first mode or a second mode, attenuates an input signal in the first mode, and passes the input signal in the second mode. The multiple attenuation circuits may provide the same or different amounts of attenuation. The multiple attenuation circuits may include binary decoded attenuation circuits and/or thermometer decoded attenuation circuits. In one design, each attenuation circuit includes a divider circuit and at least one switch. The switch(es) select the first mode or the second mode. The divider circuit attenuates an input signal in the first mode and passes the input signal in the second mode. The programmable gain circuit may have a predetermined input impedance and a predetermined output impedance for all gain settings.

Programmable gain circuit

Switches with passive bootstrap that can achieve good sampling performance are described. In one design, a sampling circuit with passive bootstrap includes first and second filters and a switch. The first filter filters an input signal and provides a filtered input signal. The second filter filters a clock signal and provides a filtered clock signal. The switch receives a control signal formed based on the filtered input signal and the filtered clock signal and either passes or blocks the input signal based on the control signal. The first filter may be a lowpass filter having a first corner frequency that is higher than the bandwidth of the input signal. The second filter may be a highpass filter having a second corner frequency that is lower than the fundamental frequency of the clock signal. The first and second filters may both be implemented with one resistor and one capacitor.

Switches with passive bootstrap of control signal

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Carlsbad, CA, United States of America

Jan Paul Van Der Wagt