Digital Equipment Corporation

Jamshed R Kapadia

Daniel T Sullivan

Charles H Kaman

James F O'Loughlin

A data processing system is described herein having a central processor unit which responds to a plurality of diverse instructions including a diagnostic instruction. The diagnostic instruction is comprised of a first and second portion preferably in the form of distinct words which are separately transmitted to the processor from a peripheral storage location or manually transmitted from a control panel for the data processing system. The first word of the instruction, when decoded by the processor, identifies the diagnostic instruction and the second word specifies the particular function to be performed. The processor is arranged such that, in the response to the first word of instruction, the second word is coupled to a specialized decoding circuit which will generate a starting address in the microprogrammable control store of the processor for a routine to execute the function specified by the second word. Utilization of the diagnostic instruction in conjunction with other instructions for moving data to or reading data from an addressable storage register within the processor permits numerous diagnostic and testing functions to be performed such as, for example, the reading and writing of internal state registers which are not addressable at the programmer's level; the executing of selected portions of the microcode in the microprogrammable control store and the operation of the cache memory.

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Waltham, MA, United States of America

Jamshed R Kapadia