Zarlink Semiconductor Limited

Conexant Systems, Inc.

Zarlink Semicorporation V.n. Inc.

James Yik

Craig Barrack

Linghsiao Wang

Rong-Feng Chang

Eric Xin Lin

John Ta

A packet switching node in a pipelined architecture processing packets received via an input port associated with the packet switching node performs a method, which includes: determining a packet frame type; selectively extracting packet header field values specific to a packet frame type, including packet addressing information; ascribing to the packet a preliminary action to be performed; searching packet switching information tracked by the packet switching node based on extracted packet addressing information; formulating a preliminary switch response for the packet; classifying the packet into a packet flow; modifying the preliminary switch response in accordance with one of the preliminary action, the packet flow into which the packet was classified, and a default port action corresponding to the input port; modifying the packet header in accordance with one of the preliminary action, the packet flow, and the default port action; and processing the packet.

Combined pipelined classification and address search method and apparatus for switching environments

Methods and apparatus are presented for scheduling playback for voice data sample packet payloads conveyed over best-effort packet-switched infrastructure. The hardware implementation presented provides support for concurrent and independent comfort noise insertion and for dynamic clock adjustment for telephone sessions provisioned concurrently without making recourse to signaling. The apparatus and methods support high density solutions scaleing up to large numbers of concurrently provisioned telephone sessions.

Hardware implementation of Voice-over-IP playback with support for comfort noise insertion

Methods and apparatus for hardware scheduling processes handling are presented. The apparatus includes a table of task lists. Each task list has specifications of processes requiring handling during a corresponding time interval. Each task list is parsed by a scheduler during a corresponding interval and the processes specified therein are handled. The methods of process handling may include a determination of a next time interval in which the process requires handling and inserting of process specifications in task lists corresponding to the determined next handling times. Implementations are also presented in which task lists specify work units requiring handling during corresponding time intervals. The entire processing power of the scheduler is used to schedule processes for handling. Advantages are derived from an efficient use of the processing power of the scheduler as the number of processes is increased.

Time-indexed multiplexing as an efficient method of scheduling in hardware

Disclosed is an apparatus and method for storing and searching computer node addresses in a computer network system. In one embodiment, the apparatus comprises a frame forwarding device such as a switch. The switch includes two MAC address tables including a primary MAC address table and secondary MAC address table both for storing and searching MAC addresses. The primary table stores records that contain compressed values of MAC addresses. The records are contained in storage locations that are referenced using the compressed value of the MAC address as a search index. In order to account for searching collisions that may result from different MAC addresses compressing to the same value, each record in the primary address table is linked to a chain of records in the secondary table. The records in the secondary table store the full value of the MAC address. Each chain of records in the secondary address table contains MAC addresses the present invention.

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Mission Viejo, CA, United States of America

James Yik