Avago Technologies International Sales Pte. Limited

Avago Technologies General IP (singapore) Pte. Ltd.

Hewlett-packard Development Company, L.p.

Emulex Design & Manufacturing Corporation

Emulex Corporation

James Winston Smart

James B Williams

Carl John Lindeborg

David James Duckman

Mark Joseph Karnowski

Shawn Adam Clayton

Vuong Cao Nguyen

Maria Clara Gutierrez

William Irving Leavitt

Kenny Wu

John Leland Wood

Gregorio Gervasio, Jr

Lalit Chhabra

Ravi Shenoy

Alexander Nicolson, Iv

Narayan Rao Ayalasomayajula

Frederick Earl Knight

Parav Kanaiyalal Pandit

Thomas E Coughlan

Chakradhara Raj Yadav Aradhyula

Tuong Le

Marc Pegolotti

Jeffrey Beckett

Systems and methods relate to a bus adapter for a storage network. The bus adaptor includes a context memory comprising a first storage for uncacheable exchange resource indicators (XRI) and a second storage for cacheable XRI. The bus adapter also includes a host backing store unit configured to provide access to the different tier memories present locally or externally in the host memory extension using several caching sub-units and with the capability of an optional pinning operation for the cacheable XRI based upon at least one of input/output phase, first in line up to a limit, a region of a virtual context address associated with the cacheable XRI indicators, a protocol associated with the cacheable XRI, a size of a transaction, or work queue information.

Adaptor storage system of and method

Systems and methods of communicating in a network use rate limiting. Rate limiting units (either receive side or transmit side) can perform rate limiting in response to a) a maximum number of bytes that can be solicited over a first period of time is exceeded, b) a maximum number of bytes that are outstanding over a second period of time is exceeded; or c) a maximum number of commands that are outstanding over a period of time is exceeded as part of CMD_RXRL. The CMD_RXRL can have three components (a) max bytes, b) outstanding bytes, c) outstanding commands. TXRL contains the component of max bytes or maximum number of bytes that can be transmitted over a third period of time to match the speed of a receive link, or any node or link through the network/fabric.

System and method for reducing congestion in a network

A system, method, and adaptor that facilitate data transmission are described. One example of the disclosed system facilitates the chip-to-chip transport of header descriptors and payloads. The system may include a source chip, a destination chip, and a set of queues describing buffer memory locations for staging header descriptors and payloads to be transferred from the source chip to the destination chip, where the set of queues are directly accessible to the source chip and to the destination chip.

System and method for port-to-port communications using direct memory access

A system for enabling input/out virtualization for a device is disclosed. In one embodiment the system includes a plurality of host CPUs; a multi-root switch connected to each of the plurality of host CPUs via respective buses; and an inline PCI virtualizing device connected to the multi-root switch via a front-side bus and the device via a back-side bus, the inline PCI virtualizing device including a plurality sets of registers, each of the plurality sets of registers accessible by a corresponding host CPU of the plurality of host CPUs and implementing functionalities of the device.

Inline PCI-IOV adapter

A system for enabling input/out virtualization for a device is disclosed. In one embodiment, the system includes a plurality of host CPUs; a multi-root switch connected to each of the plurality of host CPUs via respective buses; and an inline PCI virtualizing device connected to the multi-root switch via a front-side bus and the device via a back-side bus, the inline PCI virtualizing device including a plurality sets of registers, each of the plurality sets of registers accessible by a corresponding host CPU of the plurality of host CPUs and implementing functionalities of the device.

A system and method for managing logins and/or conducting data storage transactions, for example in a network interface. One exemplary embodiment comprises a method for interfacing a mass storage target system with a plurality of initiators. The method includes creating a data structure in local memory of a network interface chip to, at least in part, manage one or more logins; storing information comprising service parameter information m the data structure; and receiving a login request for a login comprising service parameter information. The method further includes comparing the service parameter information of the login request to the service parameter information stored in the data structure; determining, based at least in part on said comparing, to utilize the data structure to manage the login; and managing the login with the network interface chip using at least the data structure.

System and method for managing logins in a network interface

A FCP initiator sends a FCP write command to a FCP target within a second FC Exchange, and the target sends one or more FC write control IUs to the initiator within a first FC Exchange to request a transfer of data associated with the write command. The first and second FC exchanges are distinct from one another. A payload of each write control IU includes an OX_ID value with which the initiator originated the second Exchange and a RX_ID value assigned by the FCP target for the second exchange. The two Exchanges yield a full-duplex communication environment between the initiator and target that enables the reduction or elimination of latencies incurred in a conventional FCP write I/O operation due to the half-duplex nature of a single FC Exchange. The write control IU may be an enhanced FCP_XFER_RDY IU or a new FC IU previously undefined by the FCP standard.

Reducing write I/O latency using asynchronous Fibre Channel exchange

An API in an NPIV-compatible SAN is disclosed that includes functions for creating a vlink, replicating driver software for managing the vlink, monitoring resources in an HBA, or removing a target so that resources can be freed up for other vlinks. The API is part of a driver that communicates with a host OS and also communicates with an HBA to establish the vlinks between the host OS and FC devices. To create vlinks, an 'add' function in the API is called by the OS. In addition, when a new vlink is created, a single version of an HBA interface function block is maintained in the driver, but a discovery function block, SCSI bus function block, and I/O function block are all duplicated, forming one logical vlink driver for each vlink. To obtain HBA resource information, a resource monitoring functions in the API may be called by the OS.

N-port virtualization driver-based application programming interface and split driver implementation

The invention, in its various aspects and embodiments, includes a method for uniquely identifying a device on a SCSI bus. The method first queries the device with a first SCSI command to obtain general identification information. Next, a first set of identification information for the device is extracted from the general identification information. A second SCSI command is then determined from the first set of identification information. Next, the device is queried with the second SCSI command to obtain general device identifiers. A second set of identification information for the device is then extracted from the general device identifiers. Then, an unique identifier is formulated from the first and second sets of information.

Software mechanism for unique identification of SCSI device

Growing community of inventors

Costa Mesa, CA, United States of America

James Winston Smart