Cirrus Logic Inc.

James Wells

Ivan Perry

Saurabh Kumar Singh

Paul Wilson

Mark McCloy-Stevens

Simon R Foster

Huy Binh Le

Salvatore Caporale

Gavin Wilson

Niall McGurnaghan

Gagan Midha

John Priestley

Circuitry for processing an analyte signal obtained from an electrochemical cell, the circuitry comprising: measurement circuitry having a first measurement input coupled to a first electrode of the electrochemical cell, the measurement circuitry configured to convert the analyte signal at the first measurement input to a first analog output signal; an analog-to-digital converter (ADC) having an first ADC input for receiving the first analog output signal, the ADC configured to convert the first analog output signal to a first digital output signal at an ADC output; compensation circuitry configured in a measurement mode to: apply a first compensation to the first digital output signal to obtain a first compensated digital output signal, the first compensation to compensate for non-linearity in the ADC; and apply a second compensation to the first compensated digital output signal to obtain a second compensated digital output signal, the second compensation to compensate for non-linearity in the measurement circuitry; control circuitry configured in a calibration mode to: apply a first calibration signal at the first ADC input and adapt the first compensation based on the first calibration signal and the first compensated digital output signal; and apply a second calibration signal at the first electrode and adapt the second compensation based on the second calibration signal and the second compensated digital output signal.

Circuitry for measurement of electrochemical cells

Circuitry for processing an analyte signal obtained from an electrochemical cell, the circuitry including: a first signal path between a first electrode of the electrochemical cell and a first input of an analog-to-digital converter (ADC) circuit, the first signal path comprising a first gain stage configured to convert the analyte signal to a first analog signal; a second signal path between the first electrode and a second input of the ADC circuit, the second signal path comprising a second gain stage configured to convert the analyte signal to a second analog signal; and switching circuitry configured to selectively couple the first electrode to the first input of the ADC circuit.

The present disclosure relates to self-test circuitry for a system that includes one or more current control subsystems, each current control subsystem having a load terminal for coupling the current control subsystem to a load. The self-test circuitry comprises: a signal path associated with each current control subsystem, each signal path configured to selectively couple a measurement node to the load terminal of the current control subsystem, wherein the measurement node is common to all of the signal paths; voltage detection circuitry; and test voltage source circuitry configured to provide a test voltage to the measurement node. The voltage detection circuitry is operable to output a signal indicative of a fault condition if a voltage detected at the measurement node differs from the test voltage when the measurement node is coupled to the load terminal.

Self-test circuitry

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Edinburgh, United Kingdom

James Wells