Level One Communications, Inc.

Intel Corporation

James Ward Girardeau, Jr

Hiroshi Takatori

John R Camagna

Stanley K Ling

Tein-Yow Yu

Kurt E Sundstrom

Calvin Kasadate

A digital timing recovery system wherein the rate conversion is independent of the sampling rate, and which may be set in a network mode or a remote mode. The invention includes a transceiver core for processing transmit and receive data at a predetermined baud rate, an analog front end for transmitting and receiving analog signals over a network, a phase detector for generating a phase error estimate and a timing controller for receiving the phase error estimate signal and generating a receive and transmit phase control signal for controlling timing of the analog front end. A selector is provided for selecting a remote mode of operation or a network mode of operation. The analog front end further includes a transmit converter for converting the transmit data at the baud rate to a digital output at a transmit rate and a digital to analog converter for converting the digital output to an analog signal, and an analog to digital converter for converting the analog receive signal to a digital receive signal and a receive converter for converting the digital receive signal at a receive rate to the baud rate. The phase detector includes a channel estimator for generating a coefficient error signal and the timing controller includes a loop filter for producing a control signal for a numerically controlled oscillator that produces a baud interrupt signal and the phase control signals.

Apparatus for recovering timing of a digital signal for a transceiver

An activation method for an adaptive equalization in a data transceiver having at least one adaptive filter for adaptive equalization of received sample signals, includes pre-loading a fixed set of coefficients on the at least one adaptive filter in initial activation of the data transceiver. The pre-loaded adaptive filter is allowed to adapt immediately after the activation of the data transceiver. Alternatively, the pre-loaded adaptive filter is allowed to adapt after the activation of the data transceiver and a period of time thereafter. The received timing and/or signals are recovered.

Activation method in data transceivers

A converter or a resampler used in a digital communication system converts a first digital signal representing an analog signal into a second digital signal representing the same analog signal. The converter includes a converter filter and a timing circuit. The timing circuit provides a first clock generated from a second clock, and a phase control signal for controlling the conversion of the converter filter. The timing circuit is preferably a numerical controlled oscillator (NCO) and includes an accumulator for generating the first clock from the second clock and a phase offset, and a phase calculator which receives the phase offset to generate a phase control signal. The phase control signal includes a plurality of phase weighting signals, a plurality of control signals, and an interpolation signal. The first digital signal is selectively convoluted with the phase weighting signals, which is controlled by the control signals. The convoluted signals are interpolated by the interpolation signal to generate the second digital signal.

Sample rate converter

A jitter suppression apparatus in a data transmission system includes a phase detector circuit to determine a plurality of phase errors between sync pulses of a data line and sync pulses of a reference line, and an adapted phase error offset circuit, coupled to the phase detector circuit, to generate a plurality of phase error offsets and adaptively offset the plurality of phase error offsets. The jitter suppression apparatus may also include a stuff/delete slicer, coupled to the adapted phase error offset circuit, to generate a plurality of stuff/delete signals such that a framer can determine what type of data frames to send to a communication channel of the data transmission system. A jitter suppression method includes steps of detecting a phase error, computing a phase error offset, and filtering out the phase error offset. An integrator may be used to filter out the phase error offset input to the stuff/delete slicer.

Method and apparatus for suppression of jitter in data transmission systems

A communication system includes a timing circuit which generates phase conversion information from a transmitter to transfer data from a first clock domain to a second clock domain, and a receive phase calculation circuit which utilizes the phase information from the transmitter to transfer data from the second clock domain to the first clock domain. The timing circuit includes a transmit (TX) numerical controlled oscillator (NCO) and a modulo indicator, and the receive phase calculation circuit calculates a receive phase based on a modulo signal.

Receiver rate converter phase calculation apparatus and method

An activation method for adaptive equalization in a data transceiver including a plurality of adaptive filters wherein the adaptive filters are adapted with a first type of adaptation method to obtain initial convergence of the adaptive filters during an initial activation of the data transceiver and a second type of adaptation method to optimize performance of recovering the received signals in the presence of noise.

The present invention provides a transceiver which does not lose synchronization upon a transition from a non-precoded communication mode to a precoded communication mode and minimizes phase drift. A transceiver unit outputs a signal representing the phase of a received signal, and that possesses a controllable sampling rate. The transceiver is coupled to a phase reference selector and a timing control system. Upon a transition between communication modes, an adaptation period is initiated. The phase reference selector captures the phase estimate immediately prior to termination of the adaptation period, outputting a predetermined phase reference until such termination, at which point the stored phase estimate is outputted. The timing control system minimizes the difference between the phase estimate and the output of the phase reference selector by altering the sampling rate, except during the adaptation period, during which the sampling rate is held constant.

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Sacramento, CA, United States of America

James Ward Girardeau, Jr