Harris Corporation

Broadband Technologies, Inc.

Broadband Communications Products, Inc.

Jds Uniphase Corporation, Ubp

James W Toy

Paul W Casper

J Richard Jones

Randall Sharpe

Peter H Halpern

Fred J Orlando

Charles R Patisaul

Thomas E O'Shea

Ronald R Giri

Gregory M Evans

Richard N Sears

George A Waschka, Jr

Norman C Seiler

Willie T Burton, Jr

Thomas J Nixon

Harold Iley

W B Ashley

Marc Sawyer

Randall B Sharpe

Thomas E O'shea

A fiber optic digital communication system and associated transponder architecture interfaces Gigabit Ethernet digital data over an extended range fiber optic link (e.g. upwards of 30 to 100 km), using digital data signal regeneration and optical signal processing components, that pre- and post-compensate for distortion and timing jitter, and thereby ensure accurate regeneration of the data at the far end of the extended distance fiber optic link. Regeneration in both the transmit and receive paths compensates for signal degradation resulting from the very substantial `long haul` fiber distance between transponder sites, and timing jitter customarily present in low cost short haul fiber optic transceiver components. A high speed, low jitter, limiting current driver drives a distributed feedback laser, minimizing jitter generation, and optimizing range extension margin.

Gigabit data rate extended range fiber optic communication system and

A totally D.C. balanced and bit-rate independent digital clock encoding technique is applicable to a variety of digital signalling systems, including fiber optic digital signalling. Each of successive event cells of the clock signal is demarcated by clock transitions of opposite polarity, so that each clock cycle contains two event cells, one of which is redundant. For a first binary data value, such as a `0`, a pair of unmodified successive event cells of the clock signal are provided as an output. Namely, the clock signal is unaffected, so that both halves of a complete, unmodified clock cycle are reproduced `as is` as the encoded clock output. For a second binary data value, such as a `1`, an event cell is modified by inserting a pulse, of finite duration, less than the duration of the event cell, the pulse being delayed with respect to a leading clock transition of the pair of alternating, opposite clock transitions of the event cell. Since event cells are encoded in pairs, in order to provide redundancy and achieve total D.C. balance, the first pulse has a first polarity, while the second pulse has a second, complementary polarity. Because the encoding mechanism of the present invention has built-in redundancy, it readily accommodates both quality monitoring at the receiver, as well as sub-rate channel signalling.

Bit rate-insensitive mechanism for transmitting integrated clock and

A fiber optic telecommunication system has master site linked to a plurality of subscriber interface sites by a single pair of optical fibers. Downlink messages are transmitted in a continuous TDM format over a first optical fiber from the master site to subscriber interface sites, and in a burst mode TDMA format over a second optical fiber from the subscriber interface sites to the master site. Each subscriber interface site is coupled to the optical fiber link by way of a multiple fan-out fiber coupling pedestal at a common location on the fiber pair. To prevent collisions between successive uplink bursts from the subscriber interface sites, a guard band separates successive uplink messages from one another. The guard band duration accommodates optical fiber transmission distance between the common location on the uplink optical fiber and the subscriber interface site whose differential optical fiber transmission distance from the common location is greatest. A subscriber location has a television decoder associated with the subscriber's television set, through which television channel selection signals are input by the subscriber for transmission from the subscriber interface site to the master site. Power is provided by way of a replaceable battery pack, housed in a subterrestrial bell jar configuration, effectively insulating the battery pack from extreme temperature changes and the intrusion of moisture.

Fiber optic telecommunication system employing continuous downlink,

A prescramble encoding mechanism divides a data word into a plurality of sequences of data bits for transmission over a fiber optic communication link. Complementary versions of control bits and odd and even parity bits are interleaved between the bit parallel data and control signals, divides a parallel data word possible series of consecutive bits of the same logical state is less than a predetermined number related to the length of the data bit sequences and to placement of the complementary control bits and even and odd parity bits. The data frame is then scrambled prior to transmission over the fiber optic link. Depending on the exact nature of the scrambling and descrambling process, a single-bit link error may produce a plurality of bit errors in the descrambled frame. To increase the likelihood that the link error will be detected by the parity checks in the descrambled frame, a frame may be resequenced to separate adjacent bits prior to scrambling and resequenced back to the original sequence after descrambling. As a consequence, a single-bit link error which causes multiple descrambled bit errors will cause widely separated bit errors so that, for the most part, each error bit will be in a separate data bit sequence which is the subject of a separate parity bit calculation. At the receive end of the link, received signals are descrambled, resequenced back to their original order and then demultiplexed to respective outputs.

Pre-scramble encoding method and apparatus for digital communication

A multichannel data link switching control arrangement for synchronizing the substitution of one data channel for another without causing the insertion or deletion of data bits from the data transmitted over the communication path that is coupled to the channels. The switching control arrangement monitors the relative timing between the data on a channel to be replaced and the data on the replacement channel. Precisely controlled delay circuitry delays the data on one channel relative to the other until the data signals on the two channels are within .+-. a quarter bit of each other, at which time the channel substitution is effected. The arrangement includes a pair of control switch units each of which may be selectively controlled to couple either the active channel or the replacement channel to an output communication link. Each switch control unit contains an input multiplexer and an output switch, the operations of which are controlled by a data timing monitoring apparatus or control unit. The outputs of the two switch control units are coupled to signal combining and splitting circuitry the output of which may be phase compared with the data being coupled through either switch unit. A controllable data delay unit is coupled to one channel at the input to the dual switch control unit configuration and serves to selectively delay one channel with respect to the other as the data signals on both are applied to respective switch control units until the data streams on the two channels are synchronized. At that time, a control signal is applied to the two switch control units to effect a simultaneous switching of the output switches in each unit, whereby channel substitution is effected. The delay action of the delay unit remains in the replacement channel, except that no further incrementing of the delay is carried out.

Synchronized protection switching arrangement

A repeatered, multichannel fiber optic communication network includes a plurality of full duplex fiber optic channels and one or more auxiliary channels. In order to supervise and control the operation of the network, for both data transmission and fault/maintenance actions, each terminal station contains a processor-based subsystem capable of network monitoring, first level maintenance action, fault isolation, and remote network control and status reporting. This processor-based subsystem interfaces with each fiber optic channel, with an orderwire communication link, and with external input/output devices and surveillance equipment. Three substantially autonomous processor-based sections which are dedicated to performing specific functions within the overall network operation are employed for carrying out these separate interfacing tasks. Each section of the processor-based subsystem in a terminal station contains its own CPU and associated memory and is programmed to carry out specific functions identified with that section. Each section is interconnected with the other two so that, internally, the subsystem is fully integrated.

Repeatered, multi-channel fiber optic communication network having fault

In a communication system containing a scheme for externally synchronizing and scrambling digital data signals, serial digital data signals to be transmitted are subdivided into prescribed numbers or sets between which additional or overhead bits are inserted, the resulting sequence being summed in a modulo-two adder with a multi-bit maximal length PN sequence, so that one of the overhead bits is one of the bits of the maximal length scrambling sequence. A multiplexing operation yields a higher data rate sequence which is then modulo-two added with the output of a scrambler and transmitted. At the receiver station, the incoming scrambled sequence is applied to timing recovery circuitry including a local framing sequence generator. The framing sequence is located and the stages of a separate shift register, which forms part of a descrambler PN sequence generator, are forced to a state which is coincident with the frame marker. This shift register is clocked at the incoming data rate by the recovered clock from a timing recovery circuitry and its output is modulo-two added with the incoming digital data stream, thereby recovering the original multiplexed data. In order to recover the original data, the descrambled sequence is applied to a demultiplexer which effectively deletes every overhead bit and outputs the original data at the original data rate.

Combined use of PN sequence for data scrambling and frame

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Melbourne, FL, United States of America

James W Toy