Adc Telecommunications, Inc.

James W Ott

Jeffrey Brede

Adam Opoczynski

A digitally controlled phase locked loop generates a derived clock signal that is frequency locked to a reference clock signal. The apparatus is comprised of a microcontroller, counter, digital to analog converter (DAC) and a voltage controlled crystal oscillator (VCXO) connected in a feedback loop arrangement. A frequency output derived from the VCXO periodically samples an incoming reference signal. The sampled count value is compared to an ideal count value associated with the same sampling time period. A microcontroller and software-based algorithm perform the phase comparison and loop filter operations of the phase locked loop (PLL).

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Albertville, MN, United States of America

James W Ott