Raytheon Company

Indigo Systems Corporation

Santa Barbara Research Center

He Holdings, Inc.

James T Woolaway, Ii

William J Parrish

Stephen H Black

William H Frye

Joseph A Spagnolia

A method and related system provides an array of sensing elements located in rows and columns, and each column of sensing elements has a connected circuit chain which processes the signals from the sensing elements in that column. Each circuit chain produces a signal with a corrective gain value calculated for it relative to the datum of the array which is selected for the point where signal strength would be strongest. The method and device is capable of being used in a starring or scanning type array mode.

Apparatus and method for performing optical signal intensity correction in electro-optical sensor arrays

A charge transfer structure (30) includes a substrate comprised of semiconductor material and, coupled to a surface of the substrate, a plurality of serially coupled devices each having a gate terminal. The plurality of serially coupled devices include a first single port device (D1) defining a first primary charge storage well, a second single port device (D3) defining a second primary charge storage well, a first two port device (D2) defining a first transfer device, a second two port device (D4) defining a second transfer device, and two instances of a third two port device each defining a cascode device (CD). The ports of these devices are serially coupled together in an order given by D1, D2, CD, D3, D4, CD for transferring charge between the first and second primary charge storage wells. Charge is inserted into and withdrawn from each of the first and second primary charge storage wells through a single diffusion that functions as both an input port and an output port. A clock signal (P1) applied to the gate of D1 and a clock signal (P3) applied to the gate of D3 are each predetermined to deplete an underlying surface region of the substrate for forming the first primary charge storage well and the second primary charge storage well, respectively, without requiring the use of diffusion implants as in conventional bucket brigade devices.

Near complete charge transfer device

Correction for temperature-induced non-uniformities in the response characteristics of the microbolometers in an infrared focal plane array (FPA) is performed by applying a non-uniform corrective bias to the individual microbolometers. The corrective bias is applied either before or during the bias or integration period during which the detectors are sampled. The bias-correction can be applied to two-dimensional detector multiplexers at each column amplifier input, the reference potential for each column amplifier or the voltage supply for each detector element. The magnitude of each corrective bias is determined by calibrating the detectors at different temperatures and different levels of incident infrared radiation. According to another aspect of this invention, a microbolometer which is thermally-shorted to the substrate on which the read out integrated circuit (ROIC) is formed is used along with the sensing microbolometer to compensate for variations in temperature. In some embodiments, an adjustable voltage is applied to the thermally-shorted microbolometer to provide an offset correction. Circuitry for providing on-ROIC substrate temperature control is also described. This invention allows the operation of a microbolometer FPA over a wider range of device substrate temperatures and thereby significantly reduces the complexity and cost of the system as compared with the conventional technique of cooling the FPA.

Methods and circuitry for correcting temperature-induced errors in

An IR focal plane array (IR-FPA) includes an IR radiation detector (11a) having a plurality of IR radiation responsive photodetectors (PDs) and a readout integrated circuit (11) that includes a plurality of unit cells arranged in an N.times.M matrix. Each unit cell has an input coupled to an output of one of the IR radiation responsive photodetectors. The IR-FPA further includes M column amplifiers, preferably CTIAs, individual ones of which have an input that is coupled through one of N switches (.phi.tr) to individual ones of the N unit cells. A charge integrating capacitance in each unit cell is formed by a charge well underlying one (.phi..sub.1) of a plurality of transfer gates coupled between individual ones of the N unit cells that are coupled to one of the M column amplifiers. The plurality of transfer gates are a multiphase CCD, preferably a four phase CCD, and are clocked at a rate that is a function of a rate of scene image motion relative to a radiation receiving surface (10a) of the IR-FPA for transferring photodetector-generated charge packets from one row to a next, adjacent row during an integration period. In a further embodiment the M columns are partitioned into j column groups, wherein all transfer gates within one of the j column groups are clocked at a rate that is a function of a rate of scene image motion relative to the column group.

Staring IR-FPA with CCD-based image motion compensation

Correction for temperature-induced non-uniformities in the response characteristics of the microbolometers in an infrared focal plane array (FPA) is performed by applying a non-uniform corrective bias to the individual microbolometers. The corrective bias is applied either before or during the bias or integration period during which the detectors are sampled. The bias-correction can be applied to two-dimensional detector multiplexers at each column amplifier input, the reference potential for each column amplifier or the voltage supply for each detector element. The magnitude of each corrective bias is determined by calibrating the detectors at different temperatures and different levels of incident infrared radiation. According to another aspect of this invention, a microbolometer which is thermally-shorted to the substrate on which the read out integrated circuit (ROIC) is formed is used along with the sensing microbolometer to compensate for variations in temperature. Circuitry for providing on-ROIC substrate temperature control is also described. This invention allows the operation of a microbolometer FPA over a wider range of device substrate temperatures and thereby significantly reduces the complexity and cost of the system as compared with the conventional technique of cooling the FPA.

An improved imaging technique is disclosed wherein an output from an IR-FPA (16) corresponds to image motion, wherein a scene image stays correlated with the IR-FPA readout, and wherein non-uniformities (e.g., fixed pattern spatial noise) are uncorrelated from frame to frame. The uncorrelated fixed pattern spatial noise is identified and removed by a signal processor, such as a SB-NUC block (24). The scene image is scanned over the IR-FPA by a dither mirror (14) in synchronism with the movement of a frame of pixels (17) on the IR-FPA. Electronics (16a, 16b, 30, 32, 34) are included on the IR-FPA for controlling the scanning and read out of pixels within a currently selected frame.

Staring IR-FPA with dither-locked frame circuit

A Compressing Capacitively Coupled Transimpedance Amplifier (CCTIA) circuit (10) has an amplifier (AMP) with a variable capacitance feedback network (C1, C2, C3, Q1, Q2) coupled between a current receiving amplifier input node and an amplifier output node. The output node outputs a voltage in response to a received current. The variable capacitance feedback network is responsive to the output voltage for establishing one of a plurality of different transimpedance values for the circuit such that the circuit exhibits a greatest transimpedance value for an input current having a magnitude below a threshold magnitude, and a lesser transimpedance value for an input current having a magnitude equal to or above the threshold magnitude.

Capacitive transimpedance amplifier having dynamic compression

An adaptive dynamic range control circuit architecture is disclosed that enables an IR-FPA (10) to achieve a higher dynamic range. The circuit architecture significantly reduces a resolution required for an analog-to-digital converter (ADC 24) that converts the analog output signals of the IR-FPA to a digital representation. In a preferred embodiment of this invention a column CTIA readout integrated circuit architecture is used in conjunction with the adaptive feedback circuitry of this invention to provide pedestal suppression on a per-pixel basis for the IR-FPA. The use of the circuitry of this invention modifies the conventional column CTIA amplifier configuration to a configuration having an auto-zeroed charge ratioed gain stage (50). One advantage to this technique is that by suppressing the charge pedestal, the usable signal output from the IR-FPA can be brought off-chip to the readout integrated circuit at a much higher gain. As a result, the ADC requires fewer bits to resolve the useable signal information and dynamic range.

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Goleta, CA, United States of America

James T Woolaway, Ii