Digital Equipment Corporation

Compaq Computer Corporation, Inc.

James T Claffey

Joel James McCormack

Norman Paul Jouppi

Larry D Seiler

Christopher C Gianos

James M Knittel

Robert Stephen McNamara

Tracey L Gustafson

Andrew V Hoar

Danny Paul Eggleston

A computer graphics system renders an image on a display device using improved pre-filtering techniques that minimize aliasing artifacts in the image, particularly at the endpoints of lines. To anti-alias the image, a plurality of edges are placed near a line in the image. An edge function represents the edge. This edge function is multiplied by a scale factor to produce a distance function. This scale factor is the reciprocal of the Euclidean length of the line. The distance function is evaluated to determine the distance of selected pixels from each edge in units of pixels. These distances determine the intensity value for each selected pixel. Pixels on or beyond an edge, with respect to the line, are given a minimum intensity value; pixels inside all edges are given intensity values corresponding to their distances from the edge. An intensity function describing a relationship between pixel distances from the edges and their corresponding intensity values is developed. The intensity function can be implemented in a look-up table or approximated with hardware.

Pre-filtered antialiased lines using distance functions

The invention includes an apparatus and method for buffering data transmitted by a processor and received by an I/O device via a memory and buses. The memory arranged at a plurality of levels includes a lower level of the memory operating faster than a higher level of the memory. A plurality of ring buffers are allocated at different levels of the memory and available buffers at a lowest possible level of the memory are preferentially selected as write buffers to store data transmitted by the processor. The apparatus includes a first level of the memory arranged on an integrated circuit with the processor, a second level of the memory arranged in an off-chip cache, and a third level of the memory arranged in a dynamic random access memory. Read buffers are selected to store data to be received by the I/O device. Stored control values indicate the order for selecting the read buffers and are used by the processor to select the write buffer. Control values are stored in sets of registers located in the I/O device and in a software-based set of registers located in the dynamic random access memory. A selection register located in the I/O device indicates the selected read buffer.

Hierarchical ring buffers for buffering data between processor and I/O

A graphics system for storing and editing graphic images represented by digital data, includes a frame memory for storing pixel data representing graphic images including first and second graphic objects. The pixel data is stored at addresses, each being associated with one or more graphic fragment forming the first and second graphic objects. First and second addresses are respectively associated with those of the graphic fragments forming the first and second graphic objects. A memory controller controls writing and reading the pixel data to and from the frame memory. A fragment editor is provided to receive the pixel data read from the first address and modify the associated fragment with the received pixel data so as to form modified pixel data. An address detector detects the first address responsive to a request to read the pixel data from the first address and the second address responsive to a subsequent request to read pixel data from the second address. The detector compares the detected first and second addresses to identify an overlap of the first and second graphic objects. If an overlap is identified, the controller controls the writing of the modified pixel data to the first address before the reading of the pixel data from the second address.

Graphic system with read/write overlap detector

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Groton, MA, United States of America

James T Claffey