International Business Machines Corporation

James Russell Bupp

Donald Seton Farquhar

Ross William Keesler

Michael Joseph Klodowski

Andrew Michael Seman

Frank E Andros

Bernd Karl-Heinz Appelt

Michael DiPietro

Richard B Hammer

Gary Lee Schild

Voya Rista Markovich

Carlos Juan Sambucetti

Lisa Jeanine Jimarez

Stephen L Tisdale

Donna Jean Trevitt

Lawrence R Maier

Gary K Lemon

Tracy E Napp

A method of forming a plurality of solid conductive bumps for interconnecting two conductive layers of a circuit board with substantially coplanar upper surfaces. The method comprises the steps of applying a continuous homogenous metal layer onto a dielectric substrate, applying a first photoresist and exposing and developing said first photoresist to define a pattern of conductive bumps, etching the metal layer exposed by said development to form said plurality of conductive bumps, removing said first photoresist, applying a second photoresist onto the metal layer, exposing and developing said second photoresist to define a pattern of conductive bumps and circuit lines; etching the metal layer exposed by said development to form a pattern of circuit lines in said metal layer; and removing said second photoresist. The methods of the present invention also provides for fabricating a multilayer circuit board and a metallic border for providing rigidity to a panel.

Manufacturing methods for printed circuit boards

A method of forming a plurality of solid conductive bumps for interconnecting two conductive layers of a circuit board with substantially coplanar upper surfaces. The method comprises the steps of applying a continuous homogenous metal layer onto a dielectric substrate, applying a first photoresist and exposing and developing said first photoresist to define a pattern of conductive bumps; etching the metal layer exposed by said development to form said plurality of conductive bumps; removing said first photoresist; applying a second photoresist onto the metal layer; exposing and developing said second photoresist to define a pattern of conductive bumps and circuit lines; etching the metal layer exposed by said development to form a pattern of circuit lines in said metal layer; and removing said second photoresist. The methods of the present invention also provides for fabricating a multilayer circuit board and a metallic border for providing rigidity to a panel.

A method of forming a printed circuit board comprising a plurality of conductive bumps with substantially coplanar upper surfaces. The method comprises the steps of applying a metal layer onto a dielectric substrate; applying a first photoresist onto said substrate and exposing and developing said first photoresist to define a pattern of conductive bumps; etching the metal layer exposed by said development to form said plurality of conductive bumps; removing said first photoresist; applying a second photoresist onto the metal layer; exposing and developing said second photoresist to define a pattern of conductive bumps and circuit lines; etching the metal layer exposed by said development to form a pattern of circuit lines in said metal layer; and removing said second photoresist. The present invention is also provides a method for preparing a reinforced panel.

A packaging platform for interconnecting integrated circuit chips and cards, in which the platform is a circuitized fluoropolymer-based laminate carrier including high purity fluoropolymer protective barriers on its surfaces.

High performance packaging platform and method of making same

A printed circuit board comprising a plurality of conductive bumps having substantially coplanar upper surfaces is provided. The circuit board is formed by providing: a substantially planar metallic layer having a first thickness on at least one surface of the dielectric; applying a first photoresist on the metal layer; imaging the first photoresist to define a pattern of conductive bumps; etching the exposed portions of the metal layer to a second thickness to form the conductive bumps; removing the first photoresist; applying a second photoresist to the metal layer; imaging the second photoresist to define a pattern of circuitry; etching the exposed portions of the metal layer to provide the electrical circuitry; and removing the second photoresist. The present invention also provides a method for preparing printed circuit boards wherein two conductive layers that are disposed on opposing sides of a dielectric layer are inter-connected by at least one of the substantially coplanar conductive bumps. The method comprises the additional steps of depositing a second dielectric layer on the substantially coplanar conductive bumps and circuitry; exposing the upper surface of at least one of the conductive bumps; and depositing a second metal layer on the second dielectric layer and the exposed upper surface of the conductive bump. The present invention is also related to a method for preparing a reinforced panel. The method comprises the steps of: applying a metal layer having a first height on at least one surface of a dielectric substrate; applying a first photoresist to the metal layer, imaging the photoresist to provide at least one section of remaining photoresist defining an opening therein and at least one exposed region of the metal layer; etching the exposed region of the metal layer to a second height; and removing the remaining photoresist to provide a multi-layered structure comprising a dielectric layer and a metal layer comprising at least one region having a second height and at least one region having a first height.

Printed circuit board with continuous connective bumps

An electronic package which includes a rigid support member, e.g., copper sheet, to which is bonded both the package's semiconductor chip and circuitized substrate members. The chip is bonded using a thermally conductive adhesive while the circuitized substrate, preferably a flexible circuit, is bonded using an electrically insulative adhesive. The chip is electrically coupled to designated parts of the circuitry of the substrate, preferably by wire, thermocompression or thermosonic bonding. An encapsulant may be used to cover and protect the connections between the chip and substrate. This package may in turn be electrically coupled to a separate, second substrate such as a PCB.

Electronic package with thermally conductive support member having a

Method of making an electronic package with a thermally conductive

Method for electroless plating metals, such as copper, onto non-conductive substrate surfaces. The method comprises bringing the surfaces into contact with an aqueous composition containing H.sub.2 SO.sub.4 and a multifunctional cationic copolymer containing at least two available cationic moieties and then activating the surfaces by treating them with a colloidal solution containing palladium chloride, stannous chloride and HCl. The inventive method is particularly useful in processes for producing metal circuits on substrates of glass, thermoplastics and thermosetting resins, such as epoxy cards and boards. The method is also applied in reworking substrates having already undergone copper plating and having been rejected due to failures.

Method for conditioning a surface of a dielectric substrate for

A dielectric surface is conditioned for electroless plating of a conductive metal thereon by contacting the surface with a multifunctional ionic copolymer. The conditioning can be in the holes and/or on the surfaces of the substrate.

Conditioning of a substrate for electroless direct bond plating in holes

A method of detecting flaws in a printed circuit board laminate having drilled holes wherein a penetrating solution containing a UV fluorescing dye is applied to the laminate to fill the drilled holes and flaws. Excess penetrating solution is removed from the drilled holes and the surface of the laminate. The penetrating solution remaining in the flaws is cured into an insoluble solid and then the laminate is cross-sectioned to provide at least one sample carrying the cured solution. The sample is encapsulated in a clear epoxy and the encapsulated sample is ground and polished to provide a surface which is examined under UV light.

Growing community of inventors

Endwell, NY, United States of America

James Russell Bupp