Advanced Micro Devices Corporation

James Robert Klobcar

Alexander Fuad Ashkar

Michael Mantor

Harry J Wise

Manu Rastogi

Rex Eldon Mccrary

Yi Luo

Techniques for implementing accelerated draw indirect fetching are disclosed. A fetch accelerator enables streamlined data fetching by looping internally and filling a draw queue for a micro engine. By using a dedicated fetch accelerator rather than processing data fetches separately and individually using a conventional processor, significant processing overhead is eliminated and computational latency is reduced. Additionally, different types of aligned or unaligned data structures are usable with equivalent or nearly equivalent performance.

Accelerated draw indirect fetching

A processing system includes a content addressable memory (CAM) in an input/output path to selectively modify register writes on a per-pipeline basis. The CAM compares an address of a register write to an address field of each entry of the CAM. If a match is found, the CAM modifies the register write data as defined by a function for the matching entry of the CAM. In some embodiments, each entry of the CAM includes a data mask defining subfields of the register write data, wherein each subfield includes subfield data including one or more bits.

Content addressable memory with sub-field minimum and maximum clamping

Growing community of inventors

Orlando, FL, United States of America

James Robert Klobcar