Finisar Corporation

Honeywell G.m.b.h.

Spectronics Corporation

Honeywell International Inc.

Other

Texas State University

Telemedicine Up Close, Inc.

Finlsar Corporation

James Robert Biard

James Kenneth Guenter

Ralph Herbert Johnson

Jimmy Alan Tatum

R Scott Penner

Michael James Haji-Sheikh

Bobby Marion Hawkins

Klein L Johnson

Ben R Elmer

Mary K Hibbs-Brenner

Robert A Hawthorne, Iii

Colby Fitzgerald

Simon Rabinovich

Tzu-Yu Wang

Gilberto Morales

Bo Su Chen

Clois E Powell

Wayne T Kilian

Gyoungwon Park

Laszlo Kish

Yousef M Alimi

Jeanette Hill

Ray G Cook

James A Tatum

Sergey Bezrukov

Frederick J Strieter

John E Shaunfield

Royce S Speer

Ryland Young

Mosong Cheng

Maria Dobozi-King

Andrei M Manoliu

Daniel M Justiss

Gary M Aron

William A Stapleton

Cynthia S Nickel

Michael J Haji-Sheikh

An avalanche photodiode can include: an avalanche region having one or more layers prepared from GaAs; an Nabsorption layer extending across the avalanche region; an N-type layer above at least a center portion of the Nabsorption layer; and optionally a lower conductivity layer laterally from the N-type layer to a surface of the avalanche region and above a perimeter portion of the Nabsorption layer, the lower conductivity layer having lower conductivity compared to the N-type layer. The avalanche photodiode can include a window layer above the N-type layer and lower conductivity layer, and an anode contact above the window layer. The avalanche photodiode can include an Nbarrier layer below the Nabsorption layer, an Nconduction layer below the Nbarrier layer, a substrate below the Nconduction layer, and a cathode contact coupled with the Nconduction layer.

Gallium arsenide avalanche photodiode

A VCSEL with undoped top mirror. The VCSEL is formed from an epitaxial structure deposited on a substrate, and a periodically doped conduction layer is coupled to the undoped top minor. A periodically doped spacer layer is coupled to an active region. An undoped bottom minor coupled to the periodically doped spacer layer. A first intracavity contact is coupled to the periodically doped conduction layer and a second intracavity contact is coupled to the periodically doped spacer layer.

Vertical cavity surface emitting laser with undoped top mirror

A method of determining antimicrobial activity of an agent can include providing a well, wherein the well contains at least one antimicrobial agent, the well further including at least two electrodes. A sample of a microbe can be added into the well and a voltage pulsed between the electrodes. An electrical property can be sampled and recorded. In another aspect, a method of identifying at least one microbe includes taking a sample containing the at least one microbe, isolating the at least one microbe from the sample, dividing the at least one microbe into a at least one well, wherein each well contains at least one antimicrobial agent and at least two electrodes. A voltage is pulsed between the at least two electrodes, an electrical property is sampled during the pulsing and recorded. In another aspect, a diagnostic device for detecting at least one microbe is presented.

Device and method for identifying microbes and counting microbes and determining antimicrobial sensitivity

A VCSEL with undoped mirrors. An essentially undoped bottom DBR mirror is formed on a substrate. A periodically doped first conduction layer region is formed on the bottom DBR mirror. The first conduction layer region is heavily doped at a location where the optical electric field is at about a minimum. An active layer, including quantum wells, is on the first conduction layer region. A periodically doped second conduction layer region is connected to the active layer. The second conduction layer region is heavily doped where the optical electric field is at a minimum. An aperture is formed in the epitaxial structure above the quantum wells. A top mirror coupled to the periodically doped second conduction layer region. The top mirror is essentially undoped and formed in a mesa structure. An oxide is formed around the mesa structure to protect the top mirror during wet oxidation processes.

Vertical cavity surface emitting laser having multiple top-side contacts

A VCSEL with undoped top mirror. The VCSEL is formed from an epitaxial structure deposited on a substrate. A doped bottom mirror is formed on the substrate. An active layer that includes quantum wells is formed on the bottom mirror. A periodically doped conduction layer is formed on the active layer. The periodically doped conduction layer is heavily doped at locations where the optical energy is at a minimum when the VCSEL is in operation. A current aperture is used between the conduction layer and the active region. An undoped top mirror is formed on the heavily doped conduction layer.

Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer () having a substrate (), at least one active layer () and a surface layer (), and electrical contacts () formed on said surface layer (). Current control can be achieved with the formation of trenches () around electrical contacts, where electrical contacts and associated layers define an electronic device. Insulating implants () can be placed into trenches () and/or sacrificial layers () can be formed between electronic contacts (). Trenches control current by promoting current flow within active (e.g., conductive) regions () and impeding current flow through inactive (e.g., nonconductive) regions (). Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.

Providing current control over wafer borne semiconductor devices using trenches

Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer () having a substrate (), at least one active layer () and at least one surface layer (), Current control can be achieved through the formation of patterns () surrounding contacts (), said patterns () including insulating implants and/or sacrificial layers formed between active devices represented by said contacts (). Current flows through active regions () associated with said contacts () and active devices. Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.

Providing current control over wafer borne semiconductor devices using overlayer patterns

A Vertical Cavity Surface Emitting Laser (VCSEL) is optimized for longer life of the VCSEL by controlling the distance of doped and undoped layers near an active region. In addition, the VCSEL optimized for reduced parasitic lateral current under an oxide of the VCSEL by forming a high Al confinement region and placing the oxide at a null in a standing optical wave. Further, the VCSEL is optimized to reduce resistance.

VCSEL optimized for high speed data

Light emitting semiconductor devices such as VCSELs, SELs, and LEDs are manufactured to have a thin electrical confinement barrier in a confining layer near the active region of the device. The thin confinement barrier comprises a III-V semiconductor material having a high aluminum content (e.g. 80%-100% of the type III material). The aluminum content of the adjacent spacer layer is lower than that of the confinement barrier. In one embodiment the spacer layer has an aluminum content of less than 40% and a direct bandgap. The aluminum profile reduces series resistance and improves the efficiency of the semiconductor device.

Light emitting semiconductor device having an electrical confinement barrier near the active region

An optical structure that reduces the effects of spontaneous emissions from the active region of a laser. An optical structure includes optimizations to reduce the effects of spontaneous emissions. The optical structure includes a VCSEL with top and bottom DBR mirrors and an active region connected to the mirrors. The optical structure further includes a photodiode connected to the VCSEL. One or more optimizations may be included in the optical structure including optically absorbing materials, varying the geometry of the structure to change reflective angles, using optical apertures, changing the reflectivity of one or more mirrors, changing the photodiode to be more impervious to spontaneous emissions, and using ion implants to reduce photoluminescence efficiency.

Vertical cavity surface emitting laser with photodiode having reduced spontaneous emissions

Geometric optimizations for reducing spontaneous emissions in photodiodes

Optoelectronic device including integrated light emitting device and photodiode. The optoelectronic device includes a light emitting device such as a vertical cavity surface emitting laser (VCSEL) or resonant cavity light emitting diode (RCLED). A photodiode is also included in the optoelectronic device. Between the light emitting device and the photodiode is a transition region. At least part of the transition region is shorted. A metal contact provides a contact to both the light emitting device and the photodiode.

Integrated light emitting device and photodiode with OHMIC contact

Methods of conducting wafer level burn-in (WLBI) of semiconductor devices are presented wherein systems are provided having at least two electrodes (). Electrical bias () and/or thermal power () is applied on each side of a wafer () having back and front electrical contacts for semiconductor devices borne by the wafer. A pliable conductive layer () is described for supplying pins on the device side of a wafer with electrical contact and/or also for providing protection to the wafer from mechanical pressure being applied to its surfaces. Use of a cooling system () is also described for enabling the application of a uniform temperature to a wafer undergoing burn-in. Wafer level burn-in is performed by applying electrical and physical contact () using an upper contact plate to individual contacts for the semiconductor devices; applying electrical and physical contact using a lower contact plate () to a substrate surface of said semiconductor wafer; providing electrical power () to said semiconductor devices through said upper and lower second contact plates from a power source coupled to said upper and lower contacts plates; monitoring and controlling electrical power () to said semiconductor devices for a period in accordance with a specified burn-in criteria; removing electrical power at completion of said period (); and removing electrical and physical contact to said semiconductor wafer ().

Methods of conducting wafer level burn-in of electronic devices

Growing community of inventors

Richardson, TX, United States of America

James Robert Biard