Marvell International Technology Ltd

Avago Technologies General IP (singapore) Pte. Ltd.

Avago Technologies General IP Pte, Ltd.

James Richard Emmert

Michael Alvin Rencher

Charles Edward Evans

Haoran Duan

Douglas G Keithley

A system and method of testing IP cores contained in a system-on-chip integrated circuit is disclosed. An operation command is received on an input/output port of the circuit. The operation command includes an operation code component, data component(s), and expected time component. The received operation command is processed to supply test data to each of the IP cores being tested. Result data is received in response to the supplied test data from each of the IP cores being tested. The result data is processed and from the processed result data is generated a status data packet. The status data packet includes the operation code component and a status flag component and is provided on the input/output port.

On-chip test circuit and method for testing of system-on-chip (SOC) integrated circuits

A printer has voice recognition capabilities to transcribe a recorded voice message into printed text. The printer has a communication interface that is connected to a communication line for receiving a voice message. The printer also has an extended memory that stores the voice message, and a speech bank that stores speech patterns and vocabulary words. After the voice message is stored in the extended memory, a speech recognizer compares the voice message to the speech patterns and vocabulary words in the speech bank and translates the voice message into text data. The text data is stored into a print buffer, where the text data may be accessed by a central processing unit (CPU). The CPU controls a print mechanism that actually prints the text data.

Printer with speech transcription of a recorded voice message

A laser printer for Braille that obviates the need for embossing mechanisms and specialized paper. A laser printer for Braille according to the present teachings increases an amount of a toner that adheres to an area of a paper that corresponds to the Braille element. The increased amount of toner yields a printed Braille element that may be read by touch.

Laser printer for braille

A semiconductor die includes a plurality of drivers and a plurality of bonding pads. Each driver is formed by a plurality of interconnected modules and has an associated bonding pad to which at least one of the modules of the driver is electrically connected. The modules of some of the drivers are positioned outside of the associated bonding pad toward a periphery of the die. The bonding pads may be arranged, for example, in a double- or triple-staggered pattern around the periphery of the die.

Modular bonding pad structure and method

A method for implementing package-level intellectual property (PLIP) preverification for system on chip (SOC) devices includes providing at least one externally connected intellectual property (IP) core with an SOC. A package generic unit is provided with the IP core and is configured for providing external interface functions with respect to the SOC, wherein said package generic unit is pre-verified in silicon and independent of the specific packaging of the SOC. A package adaptation unit is provided with the IP core and is configured for providing external interface functions with respect to the SOC, wherein the package adaptation unit is pre-verified in silicon and dependent upon the specific packaging of the SOC.

System and method for implementing package level IP preverification for system on chip devices

Laser printer for Braille

A system and method for write-enable bypass testing in an electronic circuit. According to one embodiment, the integrated circuit that includes a memory block having at least one input and at least one output. At least one input is associated with a block of input logic and at least one output is associated with a block of output logic. The integrated circuit also includes a test circuit coupled to the memory block and operable to verify the block of input logic and the block of output logic while at the same time not impacting the timing of the integrated circuit. As such a signal propagating through just the input logic, the memory block and the output logic does so in an amount of time substantially similar the time it takes to propagate through the input logic, the memory block, the output logic, and the test circuit.

Growing community of inventors

Corvallis, OR, United States of America

James Richard Emmert