Nxp B.v.

James Raymond Spehar

Madan Vemula

Jozef Thomas Martinus Van Beek

Gerrit Willem Den Besten

Kim Phan Le

Xu Zhang

Jong Myoung Kim

Richard Te Gan

Chung Hsiung Ho

Ferdinand Jacob Sluijs

Dominicus M Roozeboom

Wayne A Nunn

James Caravella

Christian Paquet

Jingsong Zhou

Fatha Khalsa

Wayne Hsiao

Joseph E Schulze

One example discloses a power management circuit, including: an ultrasonic transmitter configured to generate an ultrasonic signal having a set of transmitted ultrasonic signal attributes; an ultrasonic receiver configured to detect the ultrasonic signal having a set of received ultrasonic signal attributes; wherein the power management circuit is configured to cause a device to be operated at a first power level and a second power level; and a proximity detection circuit configured to transition the device from the first power level to the second power level in response to a preselected difference between the transmitted set of ultrasonic signal attributes and the received set of ultrasonic signal attributes.

Power management circuit

An electric field sensor including a dielectric layer having a plane surface, at least one transceiver antenna disposed on one side of the dielectric layer, the at least one transceiver antenna configured to emit a wave above the plane surface of the dielectric layer and detect an event adjacent the plane surface, an integrated circuit coupled to the at least one transceiver antenna.

Electric field sensor

A device can be configured to provide isolation between conductive circuit paths and to selectively connect one of the conductive circuit paths to a shared interface. Each conductive circuit path can include driver circuitry designed to transmit signals according to a particular protocol and a corresponding signal speed. The shared interface can be, in one instance, a connector designed for connection to other devices. The other devices can be configured to communicate over the shared interface using one or more of the particular protocols provided using the different circuit paths.

Signal path isolation for conductive circuit paths and multipurpose interfaces

A wafer-level chip-scale package (WLCSP) includes an integrated circuit (IC) chip, and die bonding pads with a redistribution layer (RDL) having multiple via structures located directly below the footprint of a solder ball placed on the bonding pad. The via structures electrically connect the solder ball to a top metal layer of the IC chip. The RDL may extend beyond the solder ball's footprint and have additional vias that connect to the top metal layer, including vias located under and connected to other solder balls. The bonding pads have a low R-on resistance and are not susceptible to thermal-induced cracking.

Multi-via redistribution layer for integrated circuits having solder balls

Aspects of the present disclosure are directed to addressing impedance-matching issues. As may be implemented in connection with one or more embodiments, an apparatus includes an integrated circuit (IC) chip having a signal-connection terminal and processing circuitry that passes signals along a communication path that is within the IC chip and connected to the signal-connection terminal. Impedance-matching circuitry operates to provide impedance-matching for the communication path, therein mitigating signal loss due to impedance-mismatching. A chip-mounting structure secures the IC chip and electrically connects thereto at the signal-connection terminal.

Communication circuit with impedance matching

Various example embodiments are directed to methods and apparatuses for implementing a circuit design within an integrated circuit (IC) package. A respective capacitance is determined for each die contact of a circuit design. A respective target inductance range is selected for each of the plurality of die contacts based on the determined capacitance. A segmentation of the circuit design is determined as a function of the target inductance ranges. The segmentation defines an implementation of the circuit design on a plurality of IC dies. The IC dies are placed at respective locations on the substrate, based on the resulting inductances of connections (e.g., conductive traces) between the die contacts and terminals of the IC package.

Integrated circuit package and method

Cross-talk is mitigated in a switching circuit. In accordance with one or more embodiments, an apparatus includes a multi-pin connector having signal-carrying electrodes that communicate with a device external to the apparatus, and respective field-effect switches that couple the signal-carrying electrodes to respective communication channels in the apparatus. The switches include a first field-effect semiconductor switch having a gate electrode adjacent a channel region that connects electrodes (e.g., source and drain regions) when a threshold switching voltage is applied to the gate, in which the electrodes are connected between one of the signal-carrying electrodes and a first channel coupled to an electrostatic discharge (ESD) circuit. A bias circuit mitigates cross-talk between the communication channels by biasing the channel region of the first field-effect semiconductor switch (in an off state) to boost the threshold switching voltage over a threshold discharge voltage of the ESD circuit.

Cross talk mitigation

A high bandwidth circuit is segmented into a plurality of portions, each portion for implementation on a corresponding semiconductor chip, an arrangement of one or more die bond pads for each corresponding chip is generated, and a chip location for each corresponding chip is generated, given package and given package I/O arrangement is generated, the generation of the die bond arrangements and the chip position being relative to given chip package parameters, and being generated to establish bond wire lengths meeting given characteristic impedance parameters. Boundary parameters for generating the segmenting are provided, including a bound on the number of portions and optionally a including bound on the area parameters of the corresponding semiconductor chips.

Growing community of inventors

Chandler, AZ, United States of America

James Raymond Spehar