Medtronic, Inc.

Freescale Semiconductor,inc.

Motorola Corporation

Warsaw Orthopedic, Inc.

Covidien LP

James R Wasson

Joe Don Sartor

Pawitter Jit Mangat

David A Ruben

Andreas A Fenner

Jennifer Lorenz Marckmann

Scott Daniel Hector

Andrew J Ries

Randal C Schulhauser

Nicholas M Benson

Richard L Brown

Michael F Mattes

Kris A Peterson

Kenneth H Smith

Mark E Henschel

Newton H Metcalf, Jr

Sang-In Han

Clark B Norgaard

Richard L Croft

Arjun S Kurian

Bruce C Fleischhauer

Joe Mogab

Pawitter Jit Singh Mangat

Rachel M Day

Bing Lu

Scott EM Frushour

Newton H Metcalf Jr

A load sensing assembly for a spinal implant includes a set screw having a central opening that extends from a first end of the set screw toward a second end of the set screw. The second end of the set screw is configured to engage with an anchoring member. The load sensing assembly includes an antenna, an integrated circuit in communication with the antenna, where the integrated circuit is positioned within the central opening of the set screw, and a strain gauge in connection with the integrated circuit. The strain gauge is located within the central opening of the set screw in proximity to the second end of the set screw.

Antenna placement for a digital set screw

Various embodiments of a power source and a method of forming such power source are disclosed. The power source can include an enclosure, a substrate disposed within the enclosure, and radioactive material disposed within the substrate and adapted to emit radioactive particles. The power source can further include a diffusion barrier disposed over an outer surface of the substrate, and a carrier material disposed within the enclosure, where the carrier material includes an oxide material.

Power source and method of forming same

Various embodiments of a power source and method of forming such power source are disclosed. The power source can include a substrate and a cavity disposed in a first major surface of the substrate. The power source can also include radioactive material disposed within the cavity, where the radioactive material emits radiation particles; and particle converting material disposed within the cavity, where the particle converting material converts one or more radiation particles emitted by the radioactive material into light. The power source further includes a sealing layer disposed such that the particle converting material and the radioactive material are hermetically sealed within the cavity, and a photovoltaic device disposed adjacent the substrate. The photovoltaic device can convert at least a portion of the light emitted by the particle converting material that is incident upon an input surface of the photovoltaic device into electrical energy.

Systems, devices and methods are disclosed that include an antenna for an implantable medical device, the antenna including a passageway extending through the antenna windings of the antenna, the passageway providing a pathway for an electrical connector providing at least one electrical connection between a power source and electronic circuitry included within the implantable medical device.

Antenna for implantable medical devices

A thin-film device system includes a substrate and a plurality of pillars. The plurality of pillars project from a surface of the substrate. Each of the plurality of pillars have a perimeter that includes at least four protrusions that define at least four recessed regions between the at least four protrusions. Each of the at least four recessed regions of each of the plurality of pillars receives one protrusion from an adjacent one of the plurality of pillars. A thin-film device is fabricated over the plurality of pillars.

High density capacitor array patterns

A device includes a flexible substrate, N coiled conductors, and a plurality of folding regions. The N coiled conductors are deposited on the flexible substrate and connected in series by conductive interconnects. N is greater than 1. Each of the folding regions is defined by a separation distance between adjacent ones of the N coiled conductors. The conductive interconnects traverse the folding regions between the N coiled conductors to connect the N coiled conductors in series. The flexible substrate is folded such that the N coiled conductors form a stack of N coiled conductors.

Inductive coil device on flexible substrate

A patterned reflective semiconductor mask uses a multiple layer ARC overlying an absorber stack that overlies a reflective substrate. The absorber stack has more than one layer and an upper layer of the absorber stack has a predetermined metal. The multiple layer ARC overlying the upper layer of the absorber stack has layers of nitrogen, oxygen and nitrogen combined with the predetermined metal of the upper layer of the absorber stack. The oxygen layer in the ARC has less metallic properties than the nitrogen layers therein. In one form, an overlying dielectric layer is positioned on the multiple layer ARC to increase light interference. The ARC provides wide bandwidth inspection contrast for extreme ultra-violet (EUV) reticles.

Method of patterning photoresist on a wafer using a reflective mask with a multi-layer ARC

A bilayer hardmaskis used to manufacture a mask, which is can be implemented to pattern a resiston a semiconductor wafer. In one embodiment, the bilayer hardmaskhas two layers: a first hardmask layerand a second hardmask layer. The first hardmask layermay be carbon and can be etched selective to the overlying second hardmask layerand an underlying absorber structure. In one embodiment, the second hardmask layeris a transparent layer of SiON, SiN, or SiO. The bilayer hardmaskallows for a thinner resist to be used during fabrication of the mask

Method for fabricating a mask using a hardmask and method for making a semiconductor device using the same

A patterned reflective semiconductor mask () uses a multiple layer ARC () overlying an absorber stack () that overlies a reflective substrate (). The absorber stack has more than one layer and an upper layer of the absorber stack has a predetermined metal. The multiple layer ARC overlying the upper layer of the absorber stack has layers of nitrogen, oxygen and nitrogen combined with the predetermined metal of the upper layer of the absorber stack. The oxygen layer in the ARC has less metallic properties than the nitrogen layers therein. In one form, an overlying dielectric layer () is positioned on the multiple layer ARC to increase light interference. The ARC provides wide bandwidth inspection contrast for extreme ultra-violet (EUV) reticles.

A photoresist layer on a semiconductor wafer is patterned using a mask with an absorbing layer that has been repaired by using an additional light-absorbing carbon layer that collects ions that are used in the repair process. After the repair has been completed, the ions that are present in the carbon layer are removed by removing the portion of the carbon layer that is not covered by the absorbing layer. Thus, the absorbing layer, which contains the pattern that is to be exposed on the photoresist layer, also acts as a mask in the removal of the portion of the carbon layer that contains the ions. Thereby the ions that are opaque at the particular wavelength being used are removed from the areas where light is intended to pass through the mask to the photoresist. The buffer layer is made absorbing to avoid problems with reflections at interfaces thereof.

Method of patterning photoresist on a wafer using a transmission mask with a carbon layer

An attenuated phase shift mask (or) includes a substrate (or) and an attenuation stack (or) overlying the substrate. The attenuation stack includes a chromium layer or ruthenium layer (or) overlying the substrate, a tantalum silicon oxide layer (or) overlying the chromium layer or the ruthenium layer, and a tantalum silicon nitride layer (or) overlying the tantalum silicon oxide layer. The attenuation stack may also include a layer () between the substrate () and the chromium or ruthenium layer (). In one embodiment, this layer is a portion of the substrate. The attenuation stack is used to pattern photoresist () on a semiconductor wafer. In one embodiment, portions of the substrate adjacent the attenuation stack has a transmission of greater than 90 percent and the attenuation stack has a transmission of 5 to 20 percent at the exposure wavelength. In one embodiment, an inspection contrast between the substrate and the attenuation stack at an inspection wavelength is greater than 75 percent.

Method of patterning photoresist on a wafer using an attenuated phase shift mask

A stencil mask ( or ) has both a thin membrane layer ( ) and a stress controlled layer ( ) for enabling electron and ion projection lithography at very small geometries. The thin membrane layer ( ) is within a range of substantially forty to two hundred nanometers and is preferably silicon nitride, and the stress controlled layer is preferably a metal or a metal alloy. Annealing of the stress controlled layer ( ) may be performed to obtain a desired stress characteristic. Semiconductors are made using the mask by projecting radiation through the thin membrane stencil mask and reduction optics ( ) onto resist ( ) formed on a plurality of die, the radiation forming a contrast image on the resist that is subsequently developed. Commercially available lithography equipment is compatible with the thin stencil mask.

Growing community of inventors

Tempe, AZ, United States of America

James R Wasson