Dell Products Inc.

James R Pledge

Vadhiraj Sankaranarayanan

Tuyet-Huong Thi Nguyen

Amit Shah

An information handling system includes a processor, a dual in-line memory module (DIMM), and a memory controller coupled to the DIMM. The memory controller provides interrupts to the processor each time a read transaction from the DIMM results in a correctable read error. The processor instantiates a failure predictor that receives the interrupts, accumulates a count of the interrupts, and provides an error indication when the count exceeds an error threshold. The failure predictor receives a first in time interrupt, suspends the accumulation of the count for a first duration of time in response to receiving the first in time interrupt, and resumes the accumulation of the count. In resuming the accumulation of the count, the failure predictor increments the count each time the predictor receives a first subsequent interrupt and decrements the count in accordance with an error leak rate.

System and method to control memory failure handling on double-data rate dual in-line memory modules via suspension of the collection of correctable read errors

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Austin, TX, United States of America

James R Pledge