Microsoft Technology Licensing, LLC

Other

James R Larus

Alexander G Gounares

Henricus Johannes Maria Meijer

Gary William Flake

Galen Clyde Hunt

Lili Cheng

Debi P Mishra

Matthew Bret MacLaurin

Daniel S Glasser

Ira L Snyder, Jr

William Henry Gates, Iii

Arnold Neil Blinn

Christopher Wellington Brumme

Amit Mital

Raymond Edward Ozzie

Michael J Connolly

Chandramohan Amyangot Thekkath

Jan Stephen Gray

Timothy Lawrence Harris

John D DeTreville

Burton Jordan Smith

William J Bolosky

Navendu Jain

Martin Abadi

Trishul A Chilimbi

Michael B Jones

Edward Pearce Wobber

Karin Strauss

Christian L Belady

Danny Allen Reed

Douglas Christopher Burger

Michael Anthony Hall

Eric S Chung

Thomas F Bergstraesser

Nishant Dani

Melora Zaner-Godsey

Dane Alexander Glasgow

David Rogers Treadwell, Iii

Manuel Alfred Fahndrich

Trishul M Chilimbi

Steven P Levi

Robert S Davidson

Doug Burger

Christian Herwarth Borgs

Jennifer Tour Chayes

Ishai Menache

Sriram K Rajamani

Jakob Rehof

Jeremy P Condit

David R Tarditi

Ilan Lobel

Manuel A Fähndrich

Hamid Nazerzadeh

Virendra J Marathe

Benjamin Zorn

Raymond Edward Endres

Andrew Richard Putnam

Wolfgang Grieskamp

Brian Don Zill

Christopher W Fraser

Bjarne Steensgaard

Mark Aran Aiken

Thomas Michael Roeder

Jeremiah Spradlin

Charles Joseph Williams

Yuxiong He

Sameh Elnikety

Steven P Maillet

Chris Hawblitzel

Orion Hodson

Michael F Spear

Michael Carbin

Dan Reed

Bjame Steensgaard

Michael A Parkes

Chenyu Yan

Stephen F Heil

Michael Hall

Jeremiah C Spradlin

Timothy L Harris

C J Williams

A decision tree multi-processor system includes a plurality of decision tree processors that access a common feature vector and execute one or more decision trees with respect to the common feature vector. A related method includes providing a common feature vector to a plurality of decision tree processors implemented within an on-chip decision tree scoring system, and executing, by the plurality of decision tree processors, a plurality off decision trees, by reference to the common feature vector. A related decision tree-walking system includes feature storage that stores a common feature vector and a plurality of decision tree processors that access the common feature vector from the feature storage and execute a plurality of decision trees by comparing threshold values of the decision trees to feature values within the common feature vector.

Parallel decision tree processor architecture

A data center system is described which includes multiple data centers powered by multiple power sources, including any combination of renewable power sources and on-grid utility power sources. The data center system also includes a management system for managing execution of computational tasks by moving data components associated with the computational tasks within the data center system, in lieu of, or in addition to, moving power itself. The movement of data components can involve performing pre-computation or delayed computation on data components within any data center, as well as moving data components between data centers. The management system also includes a price determination module for determining prices for performing the computational tasks based on different pricing models. The data center system also includes a 'stripped down' architecture to complement its use in the above-summarized data-centric environment.

Data center system that accommodates episodic computation

The subject disclosure is directed towards scheduling requests using quality values that are defined for partial responses to the requests. For each request in a queue, an associated processing time is determined using a system load and/or the quality values. The associated processing time is less than or equal to a service demand, which represents an amount of time to produce a complete response.

Scheduling execution requests to allow partial results

Systems and methods that provide for a virtual reality entertainment system that supplies immersive entertainment and creates a sensation for a user similar to having guests in a remote location to be physically present as virtual guests. Such virtual reality entertainment system can supply a graphic and/or audio; wherein interconnected computers, video and audio processing devices, supply a live interaction between a user and a guest(s). Although guests are only present virtually (e.g., electronically present with other objects/user within the environment) such virtual invitation enables a user and guests to concurrently experience the entertainment together (e.g., a live sporting event, spectator game). In a related aspect, the subject innovation can implement holographic avatars, and a plurality of communication interfaces, to imitate (and/or transform) a relationship between the user and the virtual guests/surrounding environment.

Transformations for virtual guest representation

A memory management system is described herein that receives information from applications describing how memory is being used and that allows an application host to exert more control over application requests for using memory. The system provides an application memory management application-programming interface (API) that allows the application to specify more information about memory allocations that is helpful for managing memory later. The system also provides an ability to statically and/or dynamically analyze legacy applications to give applications that are not modified to work with the system some ability to participate in more effective memory management. The system provides application host changes to leverage the information provided by applications and to manage memory more effectively using the information and hooks into the application's use of memory. Thus, the system provides a new model for managing memory that improves application host behavior and allows applications to use computing resources more efficiently.

Memory manager with enhanced application metadata

Various technologies and techniques are disclosed for providing a hardware accelerated software transactional memory application. The software transactional memory application has access to metadata in a cache of a central processing unit that can be used to improve the operation of the STM system. For example, open read barrier filtering is provided that uses an opened-for-read bit that is contained in the metadata to avoid redundant open read processing. Similarly, redundant read log validation can be avoided using the metadata. For example, upon entering commit processing for a particular transaction, a get-evictions instruction in an instruction set architecture of the central processing unit is invoked. A retry operation can be optimized using the metadata. The particular transaction is aborted at a current point and put to sleep. The corresponding cache line metadata in the metadata are marked appropriately to efficiently detect a write by another CPU.

Cache metadata for accelerating software transactional memory

Described herein are one or more computer operating environments that include a standard set of web services via a communications network (e.g., the Internet) and a mechanism for extending the standard set of web services to execute one or more extended web services. Since these extended web services may be produced by an unconfirmed or untrusted source (e.g., a third-party software developer), the described computer operating environments isolate the extended web services from the standard set of web services and from the communication network. Furthermore, each extended web service is an isolated process (isoproc) with a limited ability to communicate with other services. In particular, each isoproc's ability to communicate is limited to only associated defined communication channels over which it has express permission to communicate.

Secure and stable hosting of third-party extensions to web services

Various technologies and techniques are disclosed for providing a bounded transactional memory application that accesses cache metadata in a cache of a central processing unit. When performing a transactional read from the bounded transactional memory application, a cache line metadata transaction-read bit is set. When performing a transactional write from the bounded transactional memory application, a cache line metadata transaction-write bit is set and a conditional store is performed. At commit time, if any lines marked with the transaction-read bit or the transaction-write bit were evicted or invalidated, all speculatively written lines are discarded. The application can also interrogate a cache line metadata eviction summary to determine whether a transaction is doomed and then take an appropriate action.

Cache metadata for implementing bounded transactional memory

Described is a technology by which alternative use for transactional memory is provided, namely implementing atomic work items that are run asynchronously from their creation in a thread. Described are mechanisms by which threads control the work items that they have created. Atomic work items are scheduled on worker threads managed by the language's runtime system. Atomic work items can use retry to express condition synchronization, providing a general mechanism for controlling when and in what order they are executed. Work items may be grouped, with coordination managed among the grouped work items. Also described by way of example is a highly-parallel implementation of a Chaff satisfiability solver, comprising an example of an important group of applications, including theorem provers and constraint optimization systems.

Lightweight transactional memory for data parallel programming

The claimed subject matter provides a system and/or a method that facilitates preserving and maintaining data and/or services associated with a network service. The network service can be any collection of resources that are maintained by a party (e.g., third-party, off-site, etc.) and accessible by an identified user over a network (e.g., WAN, Internet, etc.). An interface component can receive a termination notification related to the network service. An executor component can relocate at least a portion of one of data and a service associated with the terminated network service to a disparate replacement network service in order to preserve any services and/or data related therewith.

Determination of optimized location for services and data

Remote provisioning of an IT network and/or associated services is provided. Hardware, software, service and/or expertise can be moved from on-premise to a remote location (e.g., central, distributed . . . ). Accordingly, at least a large degree computation can be moved to the center to exploit economies of scale, among other things. In such an architecture, computational resources (e.g., data storage, computation power, cache . . . ) can be pooled, and entities can subscribe to a particular level of resources related to a private entity IT network.

Remote provisioning of information technology

Embodiments are described for managing memory faults. An example system can include a memory controller module to manage memory cells and report memory faults. An error buffer module can store memory fault information received from the memory controller. A notification module can be in communication with the error buffer module. The notification module may generate a notification of a memory fault in a memory access operation. A system software module can provide services and manage executing programs on a processor. In addition, the system software module can receive the notifications of the memory fault for the memory access operation. A notification handler may be activated by an interrupt when the notification of the memory fault in the memory access operation is received.

Managing memory faults

Various technologies and techniques are disclosed for providing software accessible metadata on a cache of a central processing unit. A multiprocessor has at least one central processing unit. The central processing unit has a cache with cache lines that are augmented by cache metadata. The cache metadata includes software-controlled metadata identifiers that allow multiple logical processors to share the cache metadata. The metadata identifiers and cache metadata can then be used to accelerate various operations. For example, parallel computations can be accelerated using cache metadata and metadata identifiers. As another example, nested computations can be accelerated using metadata identifiers and cache metadata. As yet another example, transactional memory applications that include parallelism within transactions or that include nested transactions can be also accelerated using cache metadata and metadata identifiers.

Cache metadata identifiers for isolation and sharing

The described implementations relate to energy-aware server management. One implementation involves an adaptive control unit configured to manage energy usage in a server farm by transitioning individual servers between active and inactive states while maintaining response times for the server farm at a predefined level.

Energy-aware server management

Growing community of inventors

Mercer Island, WA, United States of America

James R Larus