Intergraph Corporation

James Paul Turner

Dale L Kirkland

Jeffrey Scott Ford

Joseph Clay Terry

Cynthia E Allison

Richard W Davis, Iii

A graphics accelerator includes a plurality of digital signal processors that are arranged in a self-regulating, peer-to-peer configuration. Accordingly, the processors cooperate to process, on a cyclical basis, each of a successive series of graphics requests received over a request bus. To that end, each processor includes a request bus, an input in communication with the request bus, and an output coupled to a sequencer for ordering graphics requests processed by the digital signal processors.

Peer-to-peer parallel processing graphics accelerator

A method, apparatus, and computer program product for building at least a portion of a motion picture on a computer system first monitors memory in the computer system for the creation of a frame of the motion picture. It consequently sets a flag in the computer system when it detects that the frame has been stored in the memory. Once the flag is set, the rendered frame is directed to a motion picture builder. Each frame in the portion of the motion picture being built is processed in this manner until the motion picture portion is formed.

Automatic frame accumulator

A graphics processing accelerator has a plurality of digital signal processors that each have an output, and an input in communication with a request bus. The digital signal processors are arranged in a peer-to-peer configuration to process, on a cyclical basis, each of a successive series of graphics requests received over a request bus. The graphics processing accelerator also may have a sequencer in communication with each digital signal processor output for ordering graphics requests processed by the digital signal processors.

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Huntsville, AL, United States of America

James Paul Turner