Wang Laboratories, Inc.

James P Moskun

David J Angel

Gary A Cardone

Bruce Patterson

Carol W Tyler

Patrick Klos

Mark D Holbrook

Loren O Albright

An information processing system includes a processor responsive to instructions for performing operations. The processor includes instruction queue for fetching and storing instructions in advance of execution and the system is responsive to certain of the instructions for causing execution of a corresponding sequence of instructions. A prefetch monitor includes circuitry for detecting instructions which may result in the execution of a corresponding sequence of instructions. The prefetch monitor further includes an instruction substitution circuit which is responsive to the detecting circuitry for inhibiting the reading of following instructions from a memory to the processor and is responsive to instruction fetching operation of the processor for reading null instructions to the processor. The prefetch monitor also includes a synchronization which is responsive to a fetching operation of the processor circuit for detecting transfer of execution to a next valid instruction, wherein the substitution circuit is responsive to the synchronization circuit for resuming reading of instructions from the memory to the processor with the next valid instruction. The synchronization includes circuitry for maintaining synchronization between the operations of substituting null instructions and the execution of the instructions. In a specific implementation, the instructions which may result in the execution of a corresponding sequence of instructions are foreign to the system, a corresponding non-maskable interrupt results in the execution of a routine which emulates the execution of the foreign instruction and the null instructions are jump-to-self instructions.

Apparatus and method for monitoring and controlling the prefetching of

Emulation method and apparatus allowing a first system, which is not designed as a functional duplicate of a second system, to emulate the second system. The input/output structure of the second system is emulated in the first system by means of routines stored therein and which direct the already existing input/output structure to operate in the same manner as the input/output structure of the second system. The emulation routines are in turn invoked through the non-maskable interrupt mechanism of the first system by a modification thereto which detects the occurrence of 'foreign' input/output requests; that is, input/output requests occuring in programs originally written for the second system and which are not normally recognized by the first system. The means for detecting foreign input/output requests includes means for comparing input/output request port addresses to the range of port addresses occupied by the system input/output devices and indicating when a port address is within the range of address space occupied by the system input/output devices. The foreign request detection means generates a non-maskable interrupt to invoke an input/output emulation routine upon the occurrence of input/output requests which do not normally fall within the range of input/output ports supported by the first system.

Emulation of a data processing system

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Nashua, NH, United States of America

James P Moskun