Eastman-kodak Company

Omnivision Technologies, Inc.

James P Lavine

Eric Gordon Stevens

David L Losee

Edward T Nelson

Bruce C Burkey

Charles V Stancampiano

Gilbert Allan Hawkins

Timothy John Tredwell

Robert Michael Guidash

Constantine N Anagnostopoulos

Christopher Parks

Teh-Hsuang Lee

Edmund Kenneth Banghart

Stephen L Kosman

Mary R Suchanski

William F DesJardin

R Daniel McGrath

Teh H Lee

A method for lowering dark current in an image sensor pixel, the method includes the steps of providing a photosensitive area for receiving incident light which is converted into a charge; providing a gate for transferring charge from the photosensitive area; wherein the gate is held at a voltage which will accumulate majority carriers at a semiconductor-dielectric interface during integration for the photosensitive area. Alternatively, a potential profile can be provided under the gate to drain the dark current away from the photogeneration diffusion.

Camera, image sensor, and method for decreasing undesirable dark current

An image sensor includes a substrate of a first conductivity type having an image area with a plurality of photosensitive sites, wherein a portion of the charge generated in response to light is collected in the pixel; and a subcollector of a second conductivity spanning the image area that collects another portion of the generated charge that would have otherwise diffused to adjacent photosensitive sites.

Two epitaxial layers to reduce crosstalk in an image sensor

An image sensor for capturing an image includes a photosensitive area for receiving incident light; a substance placed covering a portion of the photosensitive area which substance includes a first index of refraction; and a plurality of electrodes positioned adjacent the substance having a dielectric placed between a portion of the electrodes, which dielectric includes a second index of refraction lower than the first index of refraction.

Image sensor having multiple layers of dielectrics adjacent the photosensitive area for improved quantum efficiency

An image sensor includes a semi-conducting substrate having a photo-sensitive region and doping for forming a path to a charge-to-voltage mechanism; a dielectric spanning the substrate; and a semi-conducting layer, which is less than approximately 1 micrometer, spanning the dielectric which contains electrodes and circuit elements that control flow of charge.

Process for making a CMOS image sensor

A charge-coupled device (CCD) image sensor that preserves defect gettering characteristics having a vertical overflow drain (VOD) for blooming protection is provided in a structure that provides low voltage electronic shuttering. This structure reduces the electronic shutter voltage to ease the demands on off-chip support circuitry required to operate the CCD image sensor. The invention provides an improved pixel structure to reduce this voltage. Prior art difficulties are avoided by providing uniform, n-type layers of varying doping levels underneath the entire area of the CCD device. Combined with a lightly doped n-type substrate these layers provide low voltage electronic shutter operation.

CCD image sensor

A method and apparatus of making high energy implanted photodiode that is self aligned with the transfer gate, the high energy implant is defined by providing a substrate, or well, of a first conductivity type, defining a charge coupled device within the substrate, or well, such that gate electrode layers are allowed to exist over areas to contain photodiodes during construction of the charge coupled device, patterning a masking layer to block high energy implants such that openings in the masking layer are formed over the areas of the photodiodes, anisotropically etching down through the gate electrode over the photodiodes to the gate dielectric material, implanting photodiodes with high-energy ions of a second conductivity type opposite the first conductivity type and creating a pinned photodiode by employing a shallow implant of the first conductivity type. The apparatus made by this method yields a photodiode employing high energy ions to form the P/N junction that is self aligned with the transfer gate.

Method of making self-aligned, high-enegry implanted photodiode for solid-state image sensors

An image sensor comprising a semiconductor of a first conductivity type having a plurality of pixels formed thereon; and a region heavily doped with the first conductivity type semiconductor beneath the pixels formed such that there is a gradient formed within the semiconductor below the pixels that is capable of directing photogenerated electrons toward the pixels and away from the heavily doped region. The gradient is formed by having a more lightly doped layer formed upon the heavily doped layer and allowing a gradient to from around the junction of the two layers.

Photogenerated carrier collection of a solid state image sensor array

A methodology for producing an edge aligned implant beneath an electrode with reduced lateral spread, comprising the steps of: providing a dielectric layer on a substrate; forming an etch-stop layer on the dielectric layer; forming a sacrificial material layer on the etch-stop layer; patterning the sacrificial layer with openings to expose the etch-stop layer and which openings corresponding to gate electrode positions; implanting dopant atoms through the opening into the substrate in regions adjacent to at least one edge of the opening in the sacrificial layer; depositing electrode material into the openings and onto the sacrificial layer; forming an electrode layer, either by itself of with another layer deposited or grown over it to allow alteration to provide an etch rate differential. The material that etches relatively slowly becomes or protects the gate electrode region. The alteration is done by a process such as diffusion or irradiation.

Method of performing edge-aligned implants

The new CCD output region provides a method of reducing the width of a wide CCD at its output to maintain a high sensitivity output node without sacrificing charge-transfer efficiency. A barrier region is shaped so the 'channel width' of the CCD increases towards the input edge of the output gate. The barrier region, therefore, decreases in width towards the output end of the final CCD phase of a multi-phase device. Also, the channel width under the output gate decreases towards its output end in the direction of charge transfer towards the floating diffusion, or detection node. Since the 'shaped' portion of the barrier region under the last CCD phase can be formed by the same process steps as the regular-shaped barrier regions, it is possible to form this structure without the requirement for additional masking and implant steps. The advantages of this structure over the prior art are improved charge-transfer characteristics without requiring additional process steps.

Image sensor with improved output region for superior charge transfer

A charge-coupled device having an improved charge-transfer efficiency over a broad temperature range. The device comprises a substrate of semiconductor material of one conductivity type; a first buried channel formed in the substrate and of a conductivity type opposite to that of the substrate; a second buried channel of a conductivity type opposite to that of the substrate formed in the same region of the substrate as the first buried channel and having a greater depth of penetration into the substrate than the first buried channel; compensated regions formed at intervals in the buried channels providing a means for containing individual packets of charge and shaped for inducing a narrow channel effect and for producing a fringing electric field in a direction of charge transfer in uncompensated buried channel regions; electrode gates associated with each pair of adjoining compensated and uncompensated regions in the device; and means for clocking the electrodes for causing a string of charge packets to be transferred through the device.

Charge-coupled device having an improved charge-transfer efficiency over

The disclosure is directed to a method of forming a CCD with two sets of gate electrodes in a single layer of a conductive material. The method comprises forming a channel region in a body of a semiconductor material along a surface thereof and forming a layer of conductive material over and insulated from the surface of the body. A first masking layer is formed on the conductive layer and spaced strips of polycrystalline silicon are formed on the first masking layer. Using a portion of the spaces between the strips as a mask, impurities of a conductivity type opposite that of the channel region are embedded in the channel region to form spaced barrier regions along the channel region. A layer of silicon dioxide is formed over each of the strips and the spaces between the strips are filled with polycrystalline silicon. The portion of the silicon dioxide layer at one end of each of the strips is etched away to expose a portion of the first masking layer. The exposed portions of the first masking layer are etched away to form grooves through the first masking layer to the conductive layer. The portions of the conductive layer at the bottom of the grooves are then etched away to define the conductive layer into closely spaced gate electrodes.

Method of making a single electrode level CCD

A charge coupled device (CCD) has a single level electrode of single crystalline silicon on an insulating layer over a surface of a body of single crystalline silicon. The CCD is made by forming a layer of insulating material on a surface of a body of single crystalline silicon with a portion of the surface being exposed. A layer of single crystalline silicon is then epitaxially grown by epitaxial lateral overgrowth on the exposed surface of the body and over the insulating material layer. The layer of single crystalline silicon is removed from the surface of the body to insulate the single crystalline silicon layer from the body by the insulating material layer. Portions of the layer of single crystalline silicon are removed to form a plurality of separate gate electrodes.

Method of making CCD having a single level electrode of single

There is disclosed a process particularly suited for making CCD's. The process comprises the steps of

Method of making edge-aligned implants and electrodes therefor

In accordance with the present invention, a conventional area image sensor of the interline transfer type is so configured as to be readable in blocks of adjacent photosite rows, thereby enabling the modified sensor to be read out at fast frame rates. The resulting sensor, although designed for block readout, can be produced using conventional manufacturing processes.

Growing community of inventors

Rochester, NY, United States of America

James P Lavine