Lsi Logic Corporation

James Ngo

Thai Minh Nguyen

William Shen

Saket K Goyal

A method and system is provided for creating a tap controller in a slice for use during custom instance creation to avoid the need of a boundary scan synthesis tool. Aspects of the present invention include during slice creation, using a software tool to create a test access port (TAP) from slice resources; during instance creation, allowing a customer to design a custom chip using the software tool to select which structures to use on the slice; and based on the customer selections, reconfiguring at the instance level connections between the tap controller and the selected structures.

Method for creating a JTAG tap controller in a slice for use during custom instance creation to avoid the need of a boundary scan synthesis tool

A method of testing a core module includes steps of: (a) providing a core module of an integrated circuit design; (b) connecting an end user input and a core module test input to separate I/O pins of the core module to isolate logic associated with an end user signal from that associated with a core module test signal; and (c) multiplexing the end user signal and the core module test signal in the core module in response to a core module test mode signal.

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San Jose, CA, United States of America

James Ngo