Itt Manufacturing Enterprises, Inc.

Itt Corporation

James Monroe Clark

Dennis D McCrady

Gene L Cangiani

Peter M Brodie

John E Petzinger

Michael Conforti

A method and apparatus for generating a data structure to be embedded in a ranging signal or in a synchronization preamble of a digital signal are disclosed. In a preferred embodiment, a plurality of blocksthrough i, where i is an integer, are formed from random sequences of components Ato Ai, each of the components being N bits, and each block including Athrough Ai components. A plurality of random sequences of components Bthrough Bi, where i is an integer, of 2N bits is also formed. The components Athrough Ai in blocksto i are formed into a matrix and the polarities of the components Athrough Ai are made to correspond to the polarities of a Hadamard matrix. The components Athrough Ai of each block are randomly permuted with components Bthrough Bi. When the permuted components of the blocks are embedded in a ranging signal or in a synchronization preamble of a signal, the blocks will appear to an unauthorized user of the signal as being unrelated.

Ranging signal structure with hidden acquisition code

A transmitter employing a cryptographic algorithm and key generates and transmits a staggered pulse signal that includes a plurality of high-power pulses that are part of a pseudonoise (PN) code. The high-power pulses are separated by a group of low-power chips and the time interval between the high-power pulses is varied according to the cryptographic algorithm and key. A receiver, employing a corresponding cryptographic algorithm and key receives the signal and correlates it with a locally generated code that is modified according to the cryptographic algorithm and key to detect the phase of the received PN code. The receiver also can include a matched filter configured according to the cryptographic algorithm and key to detect the sequence of high-power pulses in the received signal.

Staggered pulse acquisition method and apparatus

A detector receives a signal and detects from it a long code composed from shorter codes, where the shorter codes are dithered according to a non-repeating dither pattern. The received signal is correlated with a reference code, the correlation sums are ranked, and short codes detected from the ranked sums. Because of a high jamming to signal (J/S) ratio, all the transmitted short codes may not be detected. A dither matching algorithm determines an interval between the detected codes and matches it with a previously stored dither pattern. If there is a strong match, the correlation sums and respective receive times are stored in a hypothesis data structure. If enough subsequent correlation pair have similar matches to exceed a threshold, the match is declared correct and the results are output. The time difference between received and matched pairs can be a measure of a pseudorange between transmitter and receiver.

Non-stationary dither code generation and detection

An interleaved coding method can be used in a transmitter, in which the two or more pseudonoise (PN) codes are interleaved to form a longer interleaved code. The method can be used in a transmitter that includes a first code generator generating a first code of n symbols, and a second code generator generating a second code of m symbols, where n and m can be mutually prime, such as m=n+1. An interleave unit is coupled to the first and second code generators, and interleaves the symbols of the first code with the symbols of the second code to output an interleaved code. The interleaved code has a period longer than either of the constituent PN codes, providing for much increased noise tolerance over using the short codes alone, and can be detected at a much lower hardware and time cost than if using a single PN code of equal length.

Method and apparatus for generating an interleaved code

An apparatus () for generating a sequence of blocks of randomly permuted multi-bit data elements includes an input register () that produces a repeating block of distinct input data elements from which output blocks of permuted data elements are generated. A permutation logic unit () forms an output data element from each input data element in accordance with random data stored in random code memories (). The output data element produced by the permutation logic unit is supplied to an output register (). The manner in which the random data is selected and applied by the permutation logic unit ensures that each of the data elements in the input block will be mapped into an output position in the output block.

Method and apparatus for generating random permutations

An apparatus and method of detecting a transmission code from a received signal, where the transmission code is composed of a plurality of dithered codes. The codes can be dithered either by varying the length of the code or varying the phase of the code according to a dither pattern and can be a stationary dither pattern that is fixed and generally known. The method includes detecting the plurality of dithered codes, and detecting the long code based on the detected dithered codes. A detection signal is generated for each detected dither code, the detection signals are combined, and the long code is detected based on the combination of detection signals. If the composite code includes M dithered codes, the correlation signals are combined by summing the M correlation sums to generate a present final sum. The long code is detected by determining a largest final sum from among the present final sum and previously generated final sums, and associating a time of the largest final sum with the time of the transmission code.

Method and apparatus for detecting a stationary dither code

A receiver that receives a long pseudonoise (PN) code signal composed of two shorter codes interleaved with one another, includes a correlator unit that correlates the received signal with one or more reference codes corresponding to the two interleaved codes, respectively, and generates correlation signals. The receiver also includes an even code detector coupled to the correlator unit, for detecting from the correlation signals one of the two shorter codes, and an odd code detector coupled to the correlator unit, for detecting from the correlation signals the short code that is not detected by the even detector. A delay unit is coupled to the even and odd code detectors, and delays the even or the odd correlation signals so as to align the correlation signals. The aligned signals are combined and evaluated by a merit function. If the combined signals exceed a threshold value the short codes are determined to be aligned, the phase of each code can be determined, and the phase of the longer code can be determined from the determined phases of the shorter codes. The receiver can detect two short PN codes that have been combined, such as by interleaving the short codes, to create a long PN code. Hence, the receiver can inexpensively detect the two short codes which allows the receiver to detect the long code with high gain.

Method and apparatus for detecting an interleaved code

A generator generates a composite code from dithered copies of a reference code to form an optimal stationary dither code. The generator either dithers the length of the reference code to generate a boundary dither code composed of a series varying length short codes, or it dithers the phase of the reference code to generate rotation dither code composed of a series of fixed length short codes that vary in phase. The generator dithers the reference code according to a dither pattern. The composite code is an optimal dither code, having an optimal autocorrelation properties, by generating a dither pattern in which phase vectors for the constituent code are not repeated within the code.

Method and apparatus for generating and transmitting a stationary dither code

A phase meter precisely measures the phase of two signals with very different frequencies by using a sampler, permuter and a matched filter. The phase meter includes a sampler that samples the fast clock with the slow clock; a permuter that permutes the samples based on the frequencies of the fast and slow clocks; and a matched filter that sums sequences of the samples and generates maximum and minimum phase positions. The maximum and minimum phase positions indicate transition times in the fast clock. The filter can take the average of the minimum and maximum values to determine the phase of the fast clock at the middle point of a cycle. The phase meter can also be used with an interval counter to precisely adjust the transition count used by the interval counter to detect a number of cycles in the interval, and to account for partial cycles that fall within the interval.

Phase meter using a permuter and matched filter

A phase meter measures the phase of a first signal with respect to a second signal, where the first and second signals have different frequencies and the frequency of the first signal is higher than the frequency of the second signal. The phase meter samples the first signal using the second signal to produce a plurality of samples, where each sample has a sample phase and value. The phase meter permutes the plurality of sample phases to place their phase positions in phase order, and determines, for each permuted sample phase if the sample phase is within a phase range corresponding to a predetermined phase bin. If the sample is within a phase range for a phase bin, a bin counter for that bin in incremented. The phase of the faster signal is determined based on the counts in each of the phase bins.

Phase meter using a permuter

High precision transmitted navigational data as encrypted data transmitted by global positioning (GPS) satellites is made unavailable in regions designated as hostile and during desired intervals, while allowing the data to be available outside the hostile region. All satellites in the GPS constellation transmit the high precision navigational data in encrypted form. However, only the satellites that are not visible to the hostile region transmit the periodic key necessary to decrypt the data. The periodic key changes after a predetermined time interval. During a given time interval the same key value is used by all satellites for encryption of the high precision navigational data. A receiver can obtain the current periodic key from any visible satellite which is transmitting the periodic key. This key is then used to decrypt the high precision navigational data from that satellite and all other visible satellites. As a result, users in the hostile region are denied access to the high precision navigational data because they are unable to obtain the periodic key necessary to decrypt the data.

Selective denial of encrypted high precision data by indirect keying

There is disclosed encryption apparatus for generating a deterministic psuedorandom keystream of data derived from a secret key and a prearranged initial state and modulo-N adding the random data to plain text data to form a cipher text data stream to be transmitted. In order to reduce spoofing, which is the ability to alter received plain text by altering the transmitted cipher text there is means responsive to the plain text for altering a portion of the plain text data relative to corresponding cipher text data according to a permutation function which varies according to a selected keystream whereby one who does not possess said secret key cannot decrypt said cipher text and while preventing spoofing.

Anti-spoof without error extension (ANSWER)

A high-speed modulo exponentiator device employs a computation algorithm and integrated circuit ('IC') hardware implementation to perform the modulo exponentiation function of the form C=B.sup.E (Modulo M) as a series of modulo multiplication operations, which in turn are performed as a series of simple addition, multiplication and distributed modulo operations. The intermediate data maintain a bit length in the range of the bit length of the modulus value. The simplified operations are implemented via register add and shift operations in an arithmetic logic circuit. The arithmetic logic has a bit slice architecture which plural bit slices are combined to form the basic carry-save elements of the exponentiator device. The exponentiator device may be cascaded with other devices for handling numbers of longer bit lengths. Improved techniques are used for optimizing the multiplication time and for pipelining the transfer of data between cascaded elements.

High-speed modulo exponentiator device

There is disclosed an encryption apparatus which apparatus functions to raise a large unsigned integer (B) indicative of message data to a large unsigned integer power E, modulo a large unsigned integer M with each of said integers being as large as N bits wherein the resulting large unsigned integer C is adapted for transmission over an insecure communications channel. The apparatus may likewise operate on a received integer C to recover the decrypted message B. The circuitry includes first logic means which is responsive to the large unsigned integer (B) for successively squaring said integer including means for reducing said squared integers successively by a given modulus M to provide at an output a first value indicative of said squared integer as reduced by said given modulus, selectively operated gating means are coupled to said first logic means and operates to receive bits of a given exponent power E. The gating means applies selected bits of the exponent power to second logic means which are controlled by said gating means to provide the product of said first value as further modified by modulus means for providing at its output the large unsigned integer for transmission over the insecure communications channel. The first and second logic means are constructed such that the required circuit size to perform the computation is significantly reduced in complexity resulting in increased speed together with a substantial reduction in cost.

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Verona, NJ, United States of America

James Monroe Clark