Oracle International Corporation

Sun Microsystems, Inc.

Oracle America, Inc.

James Michael Frei

Stephen Andrew Muller

Xiao-Ding Cai

Jyotika Singh

Ryan Travis Caldwell

Kenneth F Hatch

Connie K Szeto

Agustin Del Alamo

A method for characterization of fixture utilizes a mirror symmetric THRU structure and either a HALF-THRU with a LOAD shunted to ground or a THRU with a LOAD shunted to ground located at the mirror reference plane. The method extracts the short, open, and thru measurements from the THRU structure due to the mirror symmetry. The HALF-THRU with a LOAD or the THRU with a LOAD shunted to ground located at the mirror reference plane provides the independent measurement to fully characterize the fixture. The resultant impedance or scattering parameter HALF-THRU model may be used in de-embedding a Device-Under-Test, a calibration routine, or computational simulations. The parameters of a HALF-THRU model may be stored in a memory storage circuit affixed to the associated HALF-THRU fixture. Some embodiments may include at least one memory storage circuit that attaches to the HALF-THRU fixture body affixed to an interposing matable connector.

De-embedding and calibration of mirror symmetric reciprocal networks

A finite impulse response (FIR) extractor includes at least one controller. The controller injects specified FIR tap values into a first captured waveform that results from transmitting a raw waveform through a transmitter circuit including a FIR filter having pre and post cursor tap values set to zero to create an expected waveform, and injects the specified FIR tap values into the raw waveform to create an ideal waveform. The controller further projects the expected and ideal waveforms onto a second captured waveform that results from transmitting the ideal waveform through the transmitter circuit with the pre and post cursor tap values set to the specified FIR tap values to create a compensated waveform, and extracts FIR tap values from the compensated waveform.

Transmitter finite impulse response characterization

Method and system that test device sensitivity according to whether the device passes or fails when subjected to a test signal. The device may be repeatedly subjected to test signal at varying operating parameters in order to assess pass-fail threshold at which the device transitions from operating properly/improperly to operating improperly/properly.

Method and system of testing device sensitivity

A method for making measurements using a vector network analyzer, and for multi-port S-parameter and T-parameter conversion includes a generalized T-matrix definition that facilitates the conversion between the S-parameters and the T-parameters for multi-port networks based on the well understood and mathematically simple 2-port relations. One contemplated approach generalizes all multi-port networks into two cases: balanced and unbalanced. Through careful selection of the T-matrix, the contemplated method extends 2-port symmetry to multi-port networks and provides an engineering implementable relationship between the S- and T-parameters for multi-port networks. This symmetry extension allows a practical means to cascade and de-embed such networks.

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Sunol, CA, United States of America

James Michael Frei